Presentation 2002/11/21
A Behavioral Synthesis System for Extended CAM Processors
Takao TOTSUKA, Yuichiro ISHIKAWA, Nozomu TOGAWA, Masao YANAGISAWA, Tatsuo OHTSUKI,
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Abstract(in English) This paper proposes a behavioral synthesis system for a processor core with an extended content addressable memory (CAM). The input of the system is an application program written in C including CAM functions. Its outputs are hardware descriptions of a synthesized processor and a binary code executed on it. An extended content addressable memory realizes not only conventional equivalent search but parallel threshold search such as less-than search and greater-than search. By utilizing ten types of these extended CAM cell arrays, our system synthesizes a CAM processor which can execute an input application program in a short time with small processor area. Experimental results for two practical application programs show the effectiveness of the proposed system and extended CAM processors.
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Keyword(in English) processor / CAM / behavioral synthesis / equivalence search / threshold search
Paper # VLD2002-113
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Committee VLD
Conference Date 2002/11/21(1days)
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Registration To VLSI Design Technologies (VLD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Behavioral Synthesis System for Extended CAM Processors
Sub Title (in English)
Keyword(1) processor
Keyword(2) CAM
Keyword(3) behavioral synthesis
Keyword(4) equivalence search
Keyword(5) threshold search
1st Author's Name Takao TOTSUKA
1st Author's Affiliation Dept. of Electronics, Information and Communication Engineering, Waseda University()
2nd Author's Name Yuichiro ISHIKAWA
2nd Author's Affiliation Dept. of Electronics, Information and Communication Engineering, Waseda University
3rd Author's Name Nozomu TOGAWA
3rd Author's Affiliation Dept. of Information and Media Sciences, The University of Kitakyushu:Advanced Research Institute for Science and Engineering, Waseda University
4th Author's Name Masao YANAGISAWA
4th Author's Affiliation Dept. of Electronics, Information and Communication Engineering, Waseda University
5th Author's Name Tatsuo OHTSUKI
5th Author's Affiliation Dept. of Electronics, Information and Communication Engineering, Waseda University
Date 2002/11/21
Paper # VLD2002-113
Volume (vol) vol.102
Number (no) 476
Page pp.pp.-
#Pages 6
Date of Issue