Presentation 2002/11/21
An Architecture for Digital Sample Interpolator : Application to Bluetooth CVSD Audio Signal Interface
Takeo YASUDA,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) In interpolating digital samples, an LPF is required to remove high frequency noise. The hardware size and power dissipation of the interpolator increases exponentially relative to the product of the interpolation ratio and the interpolation accuracy when the LPF is implemented with an FIR filter. The proposed architecture reduces the hardware size and power dissipation of the interpolator by exploiting the operational features of sample interpolation. The architecture is applied to the interpolator required in the Bluetooth audio signal transfer interface.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) interpolation / LPF / FIR Filter / LUT / distributed arithmetic / low power
Paper # VLD2002-102
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Committee VLD
Conference Date 2002/11/21(1days)
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Registration To VLSI Design Technologies (VLD)
Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) An Architecture for Digital Sample Interpolator : Application to Bluetooth CVSD Audio Signal Interface
Sub Title (in English)
Keyword(1) interpolation
Keyword(2) LPF
Keyword(3) FIR Filter
Keyword(4) LUT
Keyword(5) distributed arithmetic
Keyword(6) low power
1st Author's Name Takeo YASUDA
1st Author's Affiliation Semiconductor Technology Development, IBM Japan()
Date 2002/11/21
Paper # VLD2002-102
Volume (vol) vol.102
Number (no) 476
Page pp.pp.-
#Pages 5
Date of Issue