| Presentation | 2002/11/21 Automated Selective Multi-Threshold Design For Ultra-Low Standby Applications Kimiyoshi USAMI, Naoyuki KAWABE, Masayuki KOIZUMI, Katsuhiro SETA, Toshiyuki FURUSAWA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper describes an automated design technique to selectively use multi-threshold CMOS (MTCMOS) in a cell-by-cell fashion. MT cells consisting of low-Vth transistors and high-Vth sleep transistors are assigned to critical paths, while high-Vth cells are assigned to non-critical paths. Compared to the conventional MTCMOS, the gate delay is not affected by the discharge patterns of other gates because there is no virtual ground to be shared. We applied this technique to a test chip of a DSP core. The worst path-delay was improved by 14% over the single high-Vth design without increasing standby leakage at 10% area overhead. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Automated Design / Multi-Threshold / Standby Leakage Current |
| Paper # | VLD2002-95 |
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| Conference Information | |
| Committee | VLD |
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| Conference Date | 2002/11/21(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
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| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Automated Selective Multi-Threshold Design For Ultra-Low Standby Applications |
| Sub Title (in English) | |
| Keyword(1) | Automated Design |
| Keyword(2) | Multi-Threshold |
| Keyword(3) | Standby Leakage Current |
| 1st Author's Name | Kimiyoshi USAMI |
| 1st Author's Affiliation | Toshiba Corporation Semiconductor Company() |
| 2nd Author's Name | Naoyuki KAWABE |
| 2nd Author's Affiliation | Toshiba Corporation Semiconductor Company |
| 3rd Author's Name | Masayuki KOIZUMI |
| 3rd Author's Affiliation | Toshiba Corporation Semiconductor Company |
| 4th Author's Name | Katsuhiro SETA |
| 4th Author's Affiliation | Toshiba Corporation Semiconductor Company |
| 5th Author's Name | Toshiyuki FURUSAWA |
| 5th Author's Affiliation | Toshiba Microelectronics Corporation |
| Date | 2002/11/21 |
| Paper # | VLD2002-95 |
| Volume (vol) | vol.102 |
| Number (no) | 476 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |