| Presentation | 2002/6/22 Design Rule Extraction from DRC Rule Files, and Its Visualization Naoki KITAURA, Hiroyuki OCHI, Takao TSUDA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | DRC (Design Rule Check) is one of indispensable steps in a design flow. In order to use a DRC tool, a tool-specific rule file which describes the design rule is required. The rule file is usually created manually based on the design rule given by documents. Although the rule file is becoming longer and more sophisticated with progress of process technologies, little studies have been made for the verifying methodology of the rule file itself. In this report, we will consider to extract and visualize the design rule from the DRC rule file for Cadence's Dracula, in order to compare it with original documents. Given the rule file of the 1.2um CMOS double-metal process and 0.35um CMOS 4-layer-metal process, the developed tool displayed all rules, and 80% of rules, respectively. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | DRC / Design Rule / Rule File |
| Paper # | VLD2002-56 |
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| Conference Information | |
| Committee | VLD |
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| Conference Date | 2002/6/22(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
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| Paper Information | |
| Registration To | VLSI Design Technologies (VLD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Design Rule Extraction from DRC Rule Files, and Its Visualization |
| Sub Title (in English) | |
| Keyword(1) | DRC |
| Keyword(2) | Design Rule |
| Keyword(3) | Rule File |
| 1st Author's Name | Naoki KITAURA |
| 1st Author's Affiliation | Department of Computer Engineering, Faculty of Information Sciences, Hiroshima City University() |
| 2nd Author's Name | Hiroyuki OCHI |
| 2nd Author's Affiliation | Department of Computer Engineering, Faculty of Information Sciences, Hiroshima City University |
| 3rd Author's Name | Takao TSUDA |
| 3rd Author's Affiliation | Department of Computer Engineering, Faculty of Information Sciences, Hiroshima City University |
| Date | 2002/6/22 |
| Paper # | VLD2002-56 |
| Volume (vol) | vol.102 |
| Number (no) | 166 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |