| Presentation | 2004/9/3 Design of a Stereo Vision VLSI Processor Based on an Optimal Scheduling Masanori HARIYAMA, Michitaka KAMEYAMA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A window-parallel architecture is presented to achieve high-speed stereo matching based on SAD (Sum of Absolute Differences) computation. If a disparity constraint is used to reduce the computational amount, the number of candidate windows for SAD computation changes depending on the reference-window position. This article presents a new scheduling method selecting a pair of reference windows such that the candidate-window number becomes constant. As a result, 100% utilization of processing elements can be achieved. The performance of the VLSI processor becomes 500 times higher than that of a general-purpose processor (Pentium4@2GHz). |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Correspondence matching / Sum of absolute differences (SAD) / High-level synthesis / Logic-in-memory architecture |
| Paper # | ICD2004-99 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2004/9/3(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Design of a Stereo Vision VLSI Processor Based on an Optimal Scheduling |
| Sub Title (in English) | |
| Keyword(1) | Correspondence matching |
| Keyword(2) | Sum of absolute differences (SAD) |
| Keyword(3) | High-level synthesis |
| Keyword(4) | Logic-in-memory architecture |
| 1st Author's Name | Masanori HARIYAMA |
| 1st Author's Affiliation | Graduate School of Information Sciences, Tohoku University() |
| 2nd Author's Name | Michitaka KAMEYAMA |
| 2nd Author's Affiliation | Graduate School of Information Sciences, Tohoku University |
| Date | 2004/9/3 |
| Paper # | ICD2004-99 |
| Volume (vol) | vol.104 |
| Number (no) | 288 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |