Presentation 2004/9/3
A0.9V 1.5mW Continuous-Time ΔΣ Modulator for W-CDMA
Takeshi UENO, Tetsuro ITAKURA,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) This paper describes a second-order continuous-time ΔΣ modulator for a W-CDMA receiver, which operates at a supply voltage of 0.9 V, the lowest so far reported for W-CDMA. Inverter-based balanced OTAs without using differential pair are proposed for a low-voltage operation. Circuit parameters are optimized by system simulations. The modulator was implemented in a 0.13-μm CMOS technology. It consumes only 1.5 mW. The measured SNDR is 50.9 dB over a bandwidth of 1.92MHz.
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Keyword(in English) continuous-time ΔΣ / OTA / low-voltage / W-CDMA
Paper # ICD2004-97
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Committee ICD
Conference Date 2004/9/3(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A0.9V 1.5mW Continuous-Time ΔΣ Modulator for W-CDMA
Sub Title (in English)
Keyword(1) continuous-time ΔΣ
Keyword(2) OTA
Keyword(3) low-voltage
Keyword(4) W-CDMA
1st Author's Name Takeshi UENO
1st Author's Affiliation Corporate Research and Development Center, Toshiba Corporation()
2nd Author's Name Tetsuro ITAKURA
2nd Author's Affiliation Corporate Research and Development Center, Toshiba Corporation
Date 2004/9/3
Paper # ICD2004-97
Volume (vol) vol.104
Number (no) 288
Page pp.pp.-
#Pages 6
Date of Issue