Presentation	2004/8/12 Modeling of an On-Chip Inductor Considering Eddy Current Minoru FUJISHIMA, Jun KINO,
PDF Download Page	PDF download Page Link
Abstract(in Japanese)	(See Japanese page)
Abstract(in English)	In high-frequency silicon integrated circuits, accurate inductor model is required to suppress the degradation of inductors and to estimate the circuit performance properly. In this paper, a new inductor model is proposed where eddy current flowing in the substrate is considered since the conventional inductor model shows considerable discrepancy in an equivalent terminal resistance. The proposed model shows better agreement with the measurement results than the conventional model not only in scattering parameters but also in the circuit performance where a voltage controlled oscillator is used for a test vehicle.
Keyword(in Japanese)	(See Japanese page)
Keyword(in English)	RFIC's / on-chip inductor / model
Paper #	SDM2004-139,ICD2004-81
Date of Issue

Conference Information
Committee	ICD
Conference Date	2004/8/12(1days)
Place (in Japanese)	(See Japanese page)
Place (in English)
Topics (in Japanese)	(See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To	Integrated Circuits and Devices (ICD)
Language	JPN
Title (in Japanese)	(See Japanese page)
Sub Title (in Japanese)	(See Japanese page)
Title (in English)	Modeling of an On-Chip Inductor Considering Eddy Current
Sub Title (in English)
Keyword(1)	RFIC's
Keyword(2)	on-chip inductor
Keyword(3)	model
1st Author's Name	Minoru FUJISHIMA
1st Author's Affiliation	School of Frontier Sciences, The University of Tokyo()
2nd Author's Name	Jun KINO
2nd Author's Affiliation	School of Frontier Sciences, The University of Tokyo:(Present address)NS Solutions
Date	2004/8/12
Paper #	SDM2004-139,ICD2004-81
Volume (vol)	vol.104
Number (no)	250
Page	pp.pp.-
#Pages	6
Date of Issue