Presentation 2004/8/12
A 12.5Gbps Half-rate CMOS CDR Circuit For 10Gbps Network Applications
Jun TAKASOH, Tsutomu YOSHIMURA, Harufusa KONDOH, Norio HIGASHISAKA,
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Abstract(in English) This paper describes a true half-rate CMOS CDR circuit suitable for 10Gbps network applications. The CDR adopts a phase detector and a current mode EXOR charge pump with alleviated switching speeds to obtain higher speed margins. A 10.3Gbps CDR for 10Gbps Ethernet has been fabricated using a 0.10um SOI-CMOS process technology. With proposed circuit configuration, the CDR can operate over 12Gbps without error. The jitter tolerance is more than 0.39UI with 4M-80MHz jitter frequency range.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) True half-rate / CDR / SOI-CMOS / network application
Paper # SDM2004-131,ICD2004-73
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Conference Date 2004/8/12(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A 12.5Gbps Half-rate CMOS CDR Circuit For 10Gbps Network Applications
Sub Title (in English)
Keyword(1) True half-rate
Keyword(2) CDR
Keyword(3) SOI-CMOS
Keyword(4) network application
1st Author's Name Jun TAKASOH
1st Author's Affiliation Optoelectronic Devices Dept., High Frequency and Optical Devices Work, Mitsubishi Electric Corporation()
2nd Author's Name Tsutomu YOSHIMURA
2nd Author's Affiliation Microwave Device Development Dept., High Frequency and Optical Devices Work, Mitsubishi Electric Corporation
3rd Author's Name Harufusa KONDOH
3rd Author's Affiliation Microwave Device Development Dept., High Frequency and Optical Devices Work, Mitsubishi Electric Corporation
4th Author's Name Norio HIGASHISAKA
4th Author's Affiliation Optoelectronic Devices Dept., High Frequency and Optical Devices Work, Mitsubishi Electric Corporation
Date 2004/8/12
Paper # SDM2004-131,ICD2004-73
Volume (vol) vol.104
Number (no) 250
Page pp.pp.-
#Pages 5
Date of Issue