Presentation | 2004/4/16 Low-Power Logic-in-Memory VLSI Using a Complementary TMR/Transistor Network Akira MOCHIZUKI, Hiromitsu KIMURA, Takahiro HANYU, |
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Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | A logic-in-memory architecture using tunneling magnetoresistive(TMR) devices is proposed to realize a low-power fine-grain arithmetic VLSI. Since the TMR device can be regarded as a variable resistor with non-volatile storage capability, the logic function can be realized by series and parallel connection of the TMR devices and transistors. Moreover, the use of the complementary dynamic logic style makes it possible to perform the high-speed and low-power operations. A design example of a fine-grain arithmetic circuit, such as an SAD unit, is discussed, and its advantage is demonstrated. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | MRAM / TMR / complementary dynamic logic / differential-pair circuit / sum of absolute differ ences (SAD) |
Paper # | ICD2004-12 |
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Committee | ICD |
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Conference Date | 2004/4/16(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Integrated Circuits and Devices (ICD) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Low-Power Logic-in-Memory VLSI Using a Complementary TMR/Transistor Network |
Sub Title (in English) | |
Keyword(1) | MRAM |
Keyword(2) | TMR |
Keyword(3) | complementary dynamic logic |
Keyword(4) | differential-pair circuit |
Keyword(5) | sum of absolute differ ences (SAD) |
1st Author's Name | Akira MOCHIZUKI |
1st Author's Affiliation | Research Institute of Electrical Communication, Tohoku University() |
2nd Author's Name | Hiromitsu KIMURA |
2nd Author's Affiliation | Graduate School of Information Sciences, Tohoku University |
3rd Author's Name | Takahiro HANYU |
3rd Author's Affiliation | Research Institute of Electrical Communication, Tohoku University |
Date | 2004/4/16 |
Paper # | ICD2004-12 |
Volume (vol) | vol.104 |
Number (no) | 24 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |