Presentation | 2004/4/16 A 16Mbit Embedded DRAM Core with Low-Power Data Retention Mode for Mobile Applications Takayuki GYOHTEN, Fukashi MORISHITA, Isamu HAYASHI, Hideto MATSUOKA, Kazuhiro TAKAHASHI, Kuniyasu SHIGETA, Mitsutaka NIIRO, Mako OKAMOTO, Atsushi HACHISUKA, Atsushi AMO, Hiroki SHINKAWATA, Tatsuo KASAOKA, Katsumi DOSAKA, Kazutami ARIMOTO, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | An embedded DRAM macro with self-adjustable timing control and a power-down data retention schema is described. A 16Mb test chip is fabricated in a 0.13μm low-power process and it achieves 312MHz random cycle operation. Data retention power is 73μW, which is 5% compared to a conventional one. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Low Power / High Speed / Embedded DRAM / Mobile Application |
Paper # | ICD2004-8 |
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Conference Information | |
Committee | ICD |
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Conference Date | 2004/4/16(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | |
Chair | |
Vice Chair | |
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Paper Information | |
Registration To | Integrated Circuits and Devices (ICD) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A 16Mbit Embedded DRAM Core with Low-Power Data Retention Mode for Mobile Applications |
Sub Title (in English) | |
Keyword(1) | Low Power |
Keyword(2) | High Speed |
Keyword(3) | Embedded DRAM |
Keyword(4) | Mobile Application |
1st Author's Name | Takayuki GYOHTEN |
1st Author's Affiliation | Renesas Technology Corp.() |
2nd Author's Name | Fukashi MORISHITA |
2nd Author's Affiliation | Renesas Technology Corp. |
3rd Author's Name | Isamu HAYASHI |
3rd Author's Affiliation | Renesas Technology Corp. |
4th Author's Name | Hideto MATSUOKA |
4th Author's Affiliation | Renesas Technology Corp. |
5th Author's Name | Kazuhiro TAKAHASHI |
5th Author's Affiliation | Renesas Device Design Corp. |
6th Author's Name | Kuniyasu SHIGETA |
6th Author's Affiliation | Renesas Device Design Corp. |
7th Author's Name | Mitsutaka NIIRO |
7th Author's Affiliation | Renesas Technology Corp. |
8th Author's Name | Mako OKAMOTO |
8th Author's Affiliation | Renesas Device Design Corp. |
9th Author's Name | Atsushi HACHISUKA |
9th Author's Affiliation | Renesas Technology Corp. |
10th Author's Name | Atsushi AMO |
10th Author's Affiliation | Renesas Technology Corp. |
11th Author's Name | Hiroki SHINKAWATA |
11th Author's Affiliation | Renesas Technology Corp. |
12th Author's Name | Tatsuo KASAOKA |
12th Author's Affiliation | Renesas Technology Corp. |
13th Author's Name | Katsumi DOSAKA |
13th Author's Affiliation | Renesas Technology Corp. |
14th Author's Name | Kazutami ARIMOTO |
14th Author's Affiliation | Renesas Technology Corp |
Date | 2004/4/16 |
Paper # | ICD2004-8 |
Volume (vol) | vol.104 |
Number (no) | 24 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |