| Presentation | 2004/7/7 A CMOS Linear-in-dB Variable Gain Amplifier Using Bias Offset Sungwoo CHA, Tetsuya HIROSE, Masaki HARUOKA, Toshimasa MATSUOKA, Kenji TANIGUCHI, |
|---|---|
| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A linear-in-dB variable gain amplifier (VGA) using bias offset is fabricated in 0.25-μm CMOS technology. The complete VGA is composed of three-stage fixed gain amplifier (FGA) and two-stage linearized transconductance VGA which has wide gain range. A technique to improve the bandwidth of VGA is described. The complete VGA provides a continuous 10dB to 76.5dB gain control range, an IIP3 of -11.5dBm and an NF of 15dB at 40MHz. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | variable gain amplifier / VGA / linearized transconductance / linear-in-dB characteristics / exponential gain control / CMOS |
| Paper # | ICD2004-59 |
| Date of Issue |
| Conference Information | |
| Committee | ICD |
|---|---|
| Conference Date | 2004/7/7(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A CMOS Linear-in-dB Variable Gain Amplifier Using Bias Offset |
| Sub Title (in English) | |
| Keyword(1) | variable gain amplifier |
| Keyword(2) | VGA |
| Keyword(3) | linearized transconductance |
| Keyword(4) | linear-in-dB characteristics |
| Keyword(5) | exponential gain control |
| Keyword(6) | CMOS |
| 1st Author's Name | Sungwoo CHA |
| 1st Author's Affiliation | Department of Electronics and Information Systems, Osaka University() |
| 2nd Author's Name | Tetsuya HIROSE |
| 2nd Author's Affiliation | Department of Electronics and Information Systems, Osaka University |
| 3rd Author's Name | Masaki HARUOKA |
| 3rd Author's Affiliation | Department of Electronics and Information Systems, Osaka University |
| 4th Author's Name | Toshimasa MATSUOKA |
| 4th Author's Affiliation | Department of Electronics and Information Systems, Osaka University |
| 5th Author's Name | Kenji TANIGUCHI |
| 5th Author's Affiliation | Department of Electronics and Information Systems, Osaka University |
| Date | 2004/7/7 |
| Paper # | ICD2004-59 |
| Volume (vol) | vol.104 |
| Number (no) | 175 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |