Presentation 2004/7/7
Design of Discrete-Time Multi-bit Complex Bandpass ΔΣAD Modulators
Akira HAYAKAWA, Hao SAN, Haruo KOBAYASHI, Yoshitaka JINGU, Kazuyuki KOBAYASHI,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) This paper describes Z-domain design of multi-bit complex bandpass ΔΣAD modulators for wireless communication systems such as cellular phones, wireless LANs and Bluetooth applications. We use our proposed Data-Weighted Averaging (DWA) algorithm to suppress nonlinearity effects of such modulators incorporating multi-bit DACs. This paper describes the following : (i) How a prototype second-order lowpass ΔΣAD modulator is transformed to a complex bandpass modulator by replacing Z with jZ in the transfer function. (ii) How to solve the problem of realizing a second-order complex bandpass ΔΣAD modulator, given the poles, zeros and gain of the signal transfer function, and the poles and zeros of the noise transfer function. (iii) How a fourth-order complex bandpass ΔΣAD modulator can be designed by solving a similar realization problem. (iv) We demonstrate the effectiveness of our proposed DWA algorithm by simulation of the above three designs. (v) We compare two methods for realizing a complex bandpass filter with switched capacitor circuits. (vi) We analyze and simulate I, Q-path mismatch effects in a modulator.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Complex Bandpass ΔΣAD Modulator / Switched Capacitor Circuit / Z-Transform / Data-Weighted Averaging Algorithm / Low-IF Receiver
Paper # ICD2004-52
Date of Issue

Conference Information
Committee ICD
Conference Date 2004/7/7(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Design of Discrete-Time Multi-bit Complex Bandpass ΔΣAD Modulators
Sub Title (in English)
Keyword(1) Complex Bandpass ΔΣAD Modulator
Keyword(2) Switched Capacitor Circuit
Keyword(3) Z-Transform
Keyword(4) Data-Weighted Averaging Algorithm
Keyword(5) Low-IF Receiver
1st Author's Name Akira HAYAKAWA
1st Author's Affiliation Dept. of Electronic Engineering, Gunma University()
2nd Author's Name Hao SAN
2nd Author's Affiliation Dept. of Electronic Engineering, Gunma University
3rd Author's Name Haruo KOBAYASHI
3rd Author's Affiliation Dept. of Electronic Engineering, Gunma University
4th Author's Name Yoshitaka JINGU
4th Author's Affiliation Dept. of Electronic Engineering, Gunma University
5th Author's Name Kazuyuki KOBAYASHI
5th Author's Affiliation Dept. of Electronic Engineering, Gunma University
Date 2004/7/7
Paper # ICD2004-52
Volume (vol) vol.104
Number (no) 175
Page pp.pp.-
#Pages 6
Date of Issue