Presentation 2004/7/6
A High-Speed 3-D Range Finder Using Row-Parallel Search Architecture
Yusuke OIKE, Makoto IKEDA, Kunihiro ASADA,
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Abstract(in English) In this paper, we present a high-speed 3-D range-finding image sensor using a row-parallel search architecture, which achieves quick position detection of an incident sheet beam on the sensor plane. A 375 × 365 3-D range-finding image sensor has been designed and fabricated in a 0.18μm CMOS process. It achieves a frame access rate of 394.5 kHz with four samplings, which corresponds to 1052 range maps/s. A multi-sampling operation, which is implemented with the row-parallel search architecture on the sensor plane, improves the sub-pixel resolution up to around 0.2 pixels, and attains the range accuracy of less than 1.10mm at a target distance of 600mm.
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Keyword(in English) CMOS image sensor / smart position sensor / light-section method / 3-D range finding / row-parallel search architecture
Paper # ICD2004-38
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Committee ICD
Conference Date 2004/7/6(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A High-Speed 3-D Range Finder Using Row-Parallel Search Architecture
Sub Title (in English)
Keyword(1) CMOS image sensor
Keyword(2) smart position sensor
Keyword(3) light-section method
Keyword(4) 3-D range finding
Keyword(5) row-parallel search architecture
1st Author's Name Yusuke OIKE
1st Author's Affiliation Dept. of Electronic Engineering, University of Tokyo()
2nd Author's Name Makoto IKEDA
2nd Author's Affiliation VLSI Design and Education Center, University of Tokyo
3rd Author's Name Kunihiro ASADA
3rd Author's Affiliation VLSI Design and Education Center, University of Tokyo
Date 2004/7/6
Paper # ICD2004-38
Volume (vol) vol.104
Number (no) 174
Page pp.pp.-
#Pages 4
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