Presentation 2003/5/22
Prespectives on Power-Aware Electronics
Takayasu SAKURAI,
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Abstract(in English) In the coming ubiquitous IT society, low power design is one of the key features the VLSI designer should aim at. From the other point of view, power increase is one of the main obstaces the Moore's law is facing at. Without lowering power of VLSI's by orders of magnitude, we can not enjoy the progress that the scaling is offering. The paper coves what we have and what we should have in the low-power armory to cope with ever-increasing leakage power as well as dynamic power. The techniques to be presented range from software, system, circuit to device level. The novel trend is to look into the cooperative approaches between levels such as software-circuit cooperation and circuit-technology cooperation. The biggest challenge that System-on- Chip designers should meet in the future is the fact that transistors go more and more leaky in digital and memory circuits as generation advances. The topics to break through this stringent problem are described.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Application / Robot / Ubiquitous / CMOS / VLSI / Low-power / Memory / Logic / Software / Cooperation / Leakage
Paper # ICD2003-33
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Conference Information
Committee ICD
Conference Date 2003/5/22(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Prespectives on Power-Aware Electronics
Sub Title (in English)
Keyword(1) Application
Keyword(2) Robot
Keyword(3) Ubiquitous
Keyword(4) CMOS
Keyword(5) VLSI
Keyword(6) Low-power
Keyword(7) Memory
Keyword(8) Logic
Keyword(9) Software
Keyword(10) Cooperation
Keyword(11) Leakage
1st Author's Name Takayasu SAKURAI
1st Author's Affiliation Center for Collaborative Research, University of Tokyo()
Date 2003/5/22
Paper # ICD2003-33
Volume (vol) vol.103
Number (no) 89
Page pp.pp.-
#Pages 6
Date of Issue