| Presentation | 2003/5/21 A 750MHz 144Mb Cache DRAM LSI with Speed Scalable Design and Programmable at-speed Function-Array BIST Hideki Sakakibara, Michiaki Nakayama, Mitsugu Kusunoki, Kohzaburo Kurita, Hiroshi Otori, Masatoshi Hasegawa, Satoshi Iwahashi, Keiichi Higeta, Toshiyuki Hanashima, Hideki Hayashi, Kazuharu Kuchimachi, Katsutoshi Uehara, Takashi Nishiyama, Masaji Kume, Kazuhisa Miyamoto, Eiki Kamada, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | A 750MHz 144Mb cache DRAM LSI was successfully developed, which is based on design improvement of embedded DRAM and SRAM with speed scalability, and built-in at-speed array and function test with programmable test patterns. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | cache memory / embedded DRAM / on-chip test engine |
| Paper # | ICD2003-22 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2003/5/21(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A 750MHz 144Mb Cache DRAM LSI with Speed Scalable Design and Programmable at-speed Function-Array BIST |
| Sub Title (in English) | |
| Keyword(1) | cache memory |
| Keyword(2) | embedded DRAM |
| Keyword(3) | on-chip test engine |
| 1st Author's Name | Hideki Sakakibara |
| 1st Author's Affiliation | Device Development Center, Hitachi, Ltd.() |
| 2nd Author's Name | Michiaki Nakayama |
| 2nd Author's Affiliation | Device Development Center, Hitachi, Ltd. |
| 3rd Author's Name | Mitsugu Kusunoki |
| 3rd Author's Affiliation | Device Development Center, Hitachi, Ltd. |
| 4th Author's Name | Kohzaburo Kurita |
| 4th Author's Affiliation | Device Development Center, Hitachi, Ltd. |
| 5th Author's Name | Hiroshi Otori |
| 5th Author's Affiliation | Device Development Center, Hitachi, Ltd. |
| 6th Author's Name | Masatoshi Hasegawa |
| 6th Author's Affiliation | Device Development Center, Hitachi, Ltd. |
| 7th Author's Name | Satoshi Iwahashi |
| 7th Author's Affiliation | Device Development Center, Hitachi, Ltd. |
| 8th Author's Name | Keiichi Higeta |
| 8th Author's Affiliation | Device Development Center, Hitachi, Ltd. |
| 9th Author's Name | Toshiyuki Hanashima |
| 9th Author's Affiliation | Hitachi ULSI Systems Co., Ltd. |
| 10th Author's Name | Hideki Hayashi |
| 10th Author's Affiliation | Hitachi ULSI Systems Co., Ltd. |
| 11th Author's Name | Kazuharu Kuchimachi |
| 11th Author's Affiliation | Enterprise Server Division, Hitachi, Ltd |
| 12th Author's Name | Katsutoshi Uehara |
| 12th Author's Affiliation | Enterprise Server Division, Hitachi, Ltd |
| 13th Author's Name | Takashi Nishiyama |
| 13th Author's Affiliation | Enterprise Server Division, Hitachi, Ltd |
| 14th Author's Name | Masaji Kume |
| 14th Author's Affiliation | Enterprise Server Division, Hitachi, Ltd |
| 15th Author's Name | Kazuhisa Miyamoto |
| 15th Author's Affiliation | Enterprise Server Division, Hitachi, Ltd |
| 16th Author's Name | Eiki Kamada |
| 16th Author's Affiliation | Enterprise Server Division, Hitachi, Ltd |
| Date | 2003/5/21 |
| Paper # | ICD2003-22 |
| Volume (vol) | vol.103 |
| Number (no) | 88 |
| Page | pp.pp.- |
| #Pages | 4 |
| Date of Issue | |