Presentation | 2003/5/21 A CMOS multi-channel 10-Gb/s Transceiver Satoshi Matsubara, Hirotaka Tamura, Hideki Takauchi, Masaya Kibune, Yoshiyasu Doi, Takaya Chiba, Hideaki Anbutsu, Hisakatsu Yamaguchi, Toshihiko Mori, Motomu Takatsu, Kohtaroh Gotoh, Toshiaki Sakai, Takeshi Yamamura, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | A 1.2V single power supply 4-channels 10Gb./s I/O transceiver has been developed using 0.11um standard CMOS technology. Dual Loop PLL which consists of LC PLL and Phase-Interpolator provides low jitter and high accuracy data sampling clocks and make it easy to achieve multi channel transceiver. It consumes 310mW per channel. We designed parallel interface test chip and confirmed a 10Gb/s x4 channel data transfer and SONET OC-192 jitter tolerance compliance. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | LC PLL / Phase-Interpolator / multi-channel / Dual Loop PLL |
Paper # | ICD2003-15 |
Date of Issue |
Conference Information | |
Committee | ICD |
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Conference Date | 2003/5/21(1days) |
Place (in Japanese) | (See Japanese page) |
Place (in English) | |
Topics (in Japanese) | (See Japanese page) |
Topics (in English) | |
Chair | |
Vice Chair | |
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Assistant |
Paper Information | |
Registration To | Integrated Circuits and Devices (ICD) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A CMOS multi-channel 10-Gb/s Transceiver |
Sub Title (in English) | |
Keyword(1) | LC PLL |
Keyword(2) | Phase-Interpolator |
Keyword(3) | multi-channel |
Keyword(4) | Dual Loop PLL |
1st Author's Name | Satoshi Matsubara |
1st Author's Affiliation | Fujitsu LSI Solution LTD.() |
2nd Author's Name | Hirotaka Tamura |
2nd Author's Affiliation | Fujitsu Laboratories LTD. |
3rd Author's Name | Hideki Takauchi |
3rd Author's Affiliation | Fujitsu Laboratories LTD. |
4th Author's Name | Masaya Kibune |
4th Author's Affiliation | Fujitsu Laboratories LTD. |
5th Author's Name | Yoshiyasu Doi |
5th Author's Affiliation | Fujitsu Laboratories LTD. |
6th Author's Name | Takaya Chiba |
6th Author's Affiliation | Fujitsu Higashi-Nihon Digital Technologies |
7th Author's Name | Hideaki Anbutsu |
7th Author's Affiliation | Fujitsu Laboratories LTD. |
8th Author's Name | Hisakatsu Yamaguchi |
8th Author's Affiliation | Fujitsu Laboratories LTD. |
9th Author's Name | Toshihiko Mori |
9th Author's Affiliation | Fujitsu Laboratories LTD. |
10th Author's Name | Motomu Takatsu |
10th Author's Affiliation | Fujitsu Laboratories LTD. |
11th Author's Name | Kohtaroh Gotoh |
11th Author's Affiliation | Fujitsu Laboratories LTD. |
12th Author's Name | Toshiaki Sakai |
12th Author's Affiliation | Fujitsu LTD. |
13th Author's Name | Takeshi Yamamura |
13th Author's Affiliation | Fujitsu LTD. |
Date | 2003/5/21 |
Paper # | ICD2003-15 |
Volume (vol) | vol.103 |
Number (no) | 88 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |