| Presentation | 2003/11/21 Hardware Design and Evaluation of Multidigit FFT multiplier and Its VLSI Implementation Syunji YASAKI, Koki ABE, |
|---|---|
| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Multiplication of multidigit numbers ranging thousands digits is required in many applications such as calculation of π, cipher, etc. Multidigit multiplication is efficiently performed by FFT algorithms. In this paper we present a hardware design of FFT multiplication. First, we examine several alternatives in organizing the multiplier based on their costs required and performance obtained. Next we demonstrate the usefulness of the hardware implementation by comparing the performance with software implementation. We further present a VLSI realization of a small scale FFT multiplier on a 2.8mm square chip using CMOS 0.18μm technology, using a 16 bit data representation in floating point multiplication. The FFT multiplier using 64 bit data representation which enables 216 multiplication was found t,o be implemented on a chip of about 10mm square. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | FFT / multidigit / multiplication / hardware / VLSI |
| Paper # | ICD2003-182 |
| Date of Issue |
| Conference Information | |
| Committee | ICD |
|---|---|
| Conference Date | 2003/11/21(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Hardware Design and Evaluation of Multidigit FFT multiplier and Its VLSI Implementation |
| Sub Title (in English) | |
| Keyword(1) | FFT |
| Keyword(2) | multidigit |
| Keyword(3) | multiplication |
| Keyword(4) | hardware |
| Keyword(5) | VLSI |
| 1st Author's Name | Syunji YASAKI |
| 1st Author's Affiliation | Department of Computer Science, The University of Electro-Communications() |
| 2nd Author's Name | Koki ABE |
| 2nd Author's Affiliation | Department of Computer Science, The University of Electro-Communications |
| Date | 2003/11/21 |
| Paper # | ICD2003-182 |
| Volume (vol) | vol.103 |
| Number (no) | 478 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |