Presentation | 2003/11/21 Construction and Evaluation of Bank-based Multi-port Memory using Blocking Network Tomohiro INOUE, Tetsuo HIRONAKA, Takahiro SASAKI, Tetsushi KOIDE, Hans Jurgen MATTAUSCH, |
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PDF Download Page | PDF download Page Link |
Abstract(in Japanese) | (See Japanese page) |
Abstract(in English) | Using bank-based multi-ports memory is one of the methods to achieve high memory access band width. It is common to use crossbar network which is based on non-blocking network for combination between the processors and a memory in the conventional bank-based multi-ports memory system. However, t,here is a problem that the chip area of crossbar network becomes extremely large to increase the number of ports and banks. This report propose a compact bank-based multi-ports memory with blocking network. According to the evaluation results, the proposal method scceeded in reducing number of transistors to 10%-20% from the conventional method. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | Multi-port memory / Multi-bank memory / Blocking network |
Paper # | ICD2003-180 |
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Committee | ICD |
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Conference Date | 2003/11/21(1days) |
Place (in Japanese) | (See Japanese page) |
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Topics (in Japanese) | (See Japanese page) |
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Paper Information | |
Registration To | Integrated Circuits and Devices (ICD) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | Construction and Evaluation of Bank-based Multi-port Memory using Blocking Network |
Sub Title (in English) | |
Keyword(1) | Multi-port memory |
Keyword(2) | Multi-bank memory |
Keyword(3) | Blocking network |
1st Author's Name | Tomohiro INOUE |
1st Author's Affiliation | Graduate School of Information Sciences, Hiroshima City University() |
2nd Author's Name | Tetsuo HIRONAKA |
2nd Author's Affiliation | Graduate School of Information Sciences, Hiroshima City University |
3rd Author's Name | Takahiro SASAKI |
3rd Author's Affiliation | Department of Information Engineering, Faculty of Engineering, Mie University |
4th Author's Name | Tetsushi KOIDE |
4th Author's Affiliation | Research Center for Nanodevices and Systems, Hiroshima University |
5th Author's Name | Hans Jurgen MATTAUSCH |
5th Author's Affiliation | Research Center for Nanodevices and Systems, Hiroshima University |
Date | 2003/11/21 |
Paper # | ICD2003-180 |
Volume (vol) | vol.103 |
Number (no) | 478 |
Page | pp.pp.- |
#Pages | 6 |
Date of Issue |