Presentation 2003/11/21
Memory Packing Method in Sequential Look-Up Table Cascades
Masaki KUSANO, Tsutomu SASAO, Munehiro MATSUURA, Yukihiro IGUCHI,
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Abstract(in English) A sequential look-up table (LUT) cascade consists of memory and a control circuit, and simulates a combinational LUT cascade. In a sequential cascade, we assume that the number of inputs of each cell can be different. In this case, we can minimize the number of levels and total amount of memory for cascade by using dynamic programming. By using this technique, we could reduce the amount of memory into 40% of original size.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) BDD / LUT cascade / memory packing
Paper # ICD2003-179
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Committee ICD
Conference Date 2003/11/21(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Memory Packing Method in Sequential Look-Up Table Cascades
Sub Title (in English)
Keyword(1) BDD
Keyword(2) LUT cascade
Keyword(3) memory packing
1st Author's Name Masaki KUSANO
1st Author's Affiliation Department of Computer Science and Electronics, Kyushu Institute of Technology()
2nd Author's Name Tsutomu SASAO
2nd Author's Affiliation Department of Computer Science and Electronics, Kyushu Institute of Technology
3rd Author's Name Munehiro MATSUURA
3rd Author's Affiliation Department of Computer Science and Electronics, Kyushu Institute of Technology
4th Author's Name Yukihiro IGUCHI
4th Author's Affiliation Department of Computer Science, Meiji University
Date 2003/11/21
Paper # ICD2003-179
Volume (vol) vol.103
Number (no) 478
Page pp.pp.-
#Pages 6
Date of Issue