Presentation 2003/9/5
A CMOS Predistorter Using a P+/N Junction Diode with a Bias Feed Resistor
Sungwoo CHA, Toshimasa MATSUOKA, Kenji TANIGUCHI,
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Abstract(in English) A new predistorter (PD) using a P+/N junction diode with a bias feed resistor has been fabricated in 0.35-μm CMOS technology. The relationship between diode size and transfer characteristics of PDs with four different size diodes demonstrated that PD characteristics are determined by both equivalent resistance and junction capacitance closely related to diode size. The PD using P+/N junction diode compatible with CMOS process is verified to be quite promising to improve nonlinear characteristics of CMOS power amp (PA), such as power-added efficiency (PAE) and InterModulation Distortion (IMD) characteristics.
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Keyword(in English) CMOS / predistorter / power amp / P+/N junction diode
Paper # ICD2003-105
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Committee ICD
Conference Date 2003/9/5(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A CMOS Predistorter Using a P+/N Junction Diode with a Bias Feed Resistor
Sub Title (in English)
Keyword(1) CMOS
Keyword(2) predistorter
Keyword(3) power amp
Keyword(4) P+/N junction diode
1st Author's Name Sungwoo CHA
1st Author's Affiliation Department of Electronics and Information Systems, Osaka University()
2nd Author's Name Toshimasa MATSUOKA
2nd Author's Affiliation Department of Electronics and Information Systems, Osaka University
3rd Author's Name Kenji TANIGUCHI
3rd Author's Affiliation Department of Electronics and Information Systems, Osaka University
Date 2003/9/5
Paper # ICD2003-105
Volume (vol) vol.103
Number (no) 299
Page pp.pp.-
#Pages 5
Date of Issue