| Presentation | 2003/9/5 Design of a Skew Correctable Master-Slave Delay Locked Loop Atsushi SUZUKI, Shoji KAWAHITO, Daisuke MIYAZAKI, Masanori FURUTA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper presents a master-slave delay locked loop(DLL) for interleaved ADC's. By using the master-slave DLL, the clock skew can be corrected in the resolution of less than 1ps. The sampling clock generated by the master-slave DLL has low jitter. The output of the master DLL is used for the reference clock for all the slave DLLs. Current-output digital-to-analog converters(DACs) are used for the charge pump of the slave DLLs to digitally correct the skew. Simulation results show that the clock skew can be corrected in the resolution of less than 1ps using a current output DAC of the resolution of 0.25μA. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | DLL / skew / jitter / A/D converter |
| Paper # | ICD2003-96 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2003/9/5(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Design of a Skew Correctable Master-Slave Delay Locked Loop |
| Sub Title (in English) | |
| Keyword(1) | DLL |
| Keyword(2) | skew |
| Keyword(3) | jitter |
| Keyword(4) | A/D converter |
| 1st Author's Name | Atsushi SUZUKI |
| 1st Author's Affiliation | Graduate School of Electronics Science and Technology, Shizuoka University() |
| 2nd Author's Name | Shoji KAWAHITO |
| 2nd Author's Affiliation | Research Institute of Electronics, Shizuoka University |
| 3rd Author's Name | Daisuke MIYAZAKI |
| 3rd Author's Affiliation | Research Institute of Electronics, Shizuoka University |
| 4th Author's Name | Masanori FURUTA |
| 4th Author's Affiliation | Graduate School of Electronics Science and Technology, Shizuoka University |
| Date | 2003/9/5 |
| Paper # | ICD2003-96 |
| Volume (vol) | vol.103 |
| Number (no) | 299 |
| Page | pp.pp.- |
| #Pages | 4 |
| Date of Issue | |