Presentation 2003/9/5
A study of a voltage reference circuit by using weakly inverted CMOS transistors
Akinori KABAYA, Yasuhiro SUGIMOTO,
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Abstract(in English) In this paper, design and evaluation results of a low-power voltage reference circuit with 1.0V output voltage by using a conventional CMOS process are reported. The objective of this study is to realize a voltage reference circuit with less than 1V of the output voltage for switching power supplies such as DC-DC converters. The circuit utilizes a MOS transistors in weakly inverted region, whose characteristic resembles to the one of a bipolar transistor, in order to obtain 1.0V stable output voltage that is independent of temperature. An actual chip was designed, fabricated, and evaluated by using a 0.6μm CMOS process. The evaluation result shows less than 0.38 % of output voltage variation when it is chosen 1.0V and the temperature changes from 0 ℃ to 75 ℃. The supply voltage for the entire circuit was 3.6V. The result demonstrates the effectiveness of using weakly inverted transistors in a voltage reference circuit.
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Keyword(in English) CMOS / Voltage reference / Weak inversion region
Paper # ICD2003-94
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Committee ICD
Conference Date 2003/9/5(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A study of a voltage reference circuit by using weakly inverted CMOS transistors
Sub Title (in English)
Keyword(1) CMOS
Keyword(2) Voltage reference
Keyword(3) Weak inversion region
1st Author's Name Akinori KABAYA
1st Author's Affiliation Faculty of Science and Engineering, Chuo University()
2nd Author's Name Yasuhiro SUGIMOTO
2nd Author's Affiliation Faculty of Science and Engineering, Chuo University
Date 2003/9/5
Paper # ICD2003-94
Volume (vol) vol.103
Number (no) 299
Page pp.pp.-
#Pages 6
Date of Issue