Presentation 2003/8/14
Semi-Planar SOI MOSFETs for low-power operation
Toshiharu NAGUMO, Toshiro HIRAMOTO,
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Abstract(in English) We propose semi-planar silicon-on-insulator (SOI) MOSFETs for ultra-low power LSIs. As device dimensions scale down, threshold voltage fluctuation becomes the most serious issue as well as the short channel effect. Adaptive control of threshold voltage utilizing substrate bias is quite effective for suppressing threshold voltage fluctuation. Semi-planar SOI MOSFETs offers not only suppression of the short channel effect by the three-dimensional gate structure, but also finite value of body effect factor, thus suppression of fluctuation is possible. This paper describes superiority of semi-planar SOI MOSFETs over the conventional SOI MOSFETs by demonstrating simulation and experimental results of the short channel effect, S-factor, and the body effect factor on triangular wire channel structure and low-Fin structure.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) body effect / short channel effect / characteristics fluctuation / variable threshold voltage CMOS (VTCMOS) / fully-depleted SOI MOSFET
Paper # SDM2003-120,ICD2003-53
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Committee ICD
Conference Date 2003/8/14(1days)
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Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Semi-Planar SOI MOSFETs for low-power operation
Sub Title (in English)
Keyword(1) body effect
Keyword(2) short channel effect
Keyword(3) characteristics fluctuation
Keyword(4) variable threshold voltage CMOS (VTCMOS)
Keyword(5) fully-depleted SOI MOSFET
1st Author's Name Toshiharu NAGUMO
1st Author's Affiliation Institute of Industrial Science, University of Tokyo()
2nd Author's Name Toshiro HIRAMOTO
2nd Author's Affiliation Institute of Industrial Science, University of Tokyo
Date 2003/8/14
Paper # SDM2003-120,ICD2003-53
Volume (vol) vol.103
Number (no) 261
Page pp.pp.-
#Pages 6
Date of Issue