| Presentation | 2003/4/3 Development and Issues of MRAM, as a High Performance RAM Hiroaki Yoda, Yoshiaki Asao, Yoshiaki Saito, Tomomasa Ueda, Kuniko Kikuta, Tatsuya Kishi, Sumio Ikegawa, Nobuyuki Ishiwata, Kenji Tsuchida, Shuichi Tahara, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Issues of MRAM to be a versatile memory were identified and technology candidates to overcome the issues were reviewed. Further, yoke wire technology, which was thought to overcome the biggest issue, large write current,, was developed, successfully implemented in 1kbit-MRAM, and proved its effectiveness. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | MRAM / MTJ / Yoke / Write Current / Scaling / Double Tunnel Junction |
| Paper # | ICD2003-3 |
| Date of Issue |
| Conference Information | |
| Committee | ICD |
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| Conference Date | 2003/4/3(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Development and Issues of MRAM, as a High Performance RAM |
| Sub Title (in English) | |
| Keyword(1) | MRAM |
| Keyword(2) | MTJ |
| Keyword(3) | Yoke |
| Keyword(4) | Write Current |
| Keyword(5) | Scaling |
| Keyword(6) | Double Tunnel Junction |
| 1st Author's Name | Hiroaki Yoda |
| 1st Author's Affiliation | Corporate Research & Development Center, Toshiba Corporation() |
| 2nd Author's Name | Yoshiaki Asao |
| 2nd Author's Affiliation | SoC Research and Development Center, Semiconductor Company, Toshiba Corporation |
| 3rd Author's Name | Yoshiaki Saito |
| 3rd Author's Affiliation | Corporate Research & Development Center, Toshiba Corporation |
| 4th Author's Name | Tomomasa Ueda |
| 4th Author's Affiliation | Corporate Research & Development Center, Toshiba Corporation |
| 5th Author's Name | Kuniko Kikuta |
| 5th Author's Affiliation | Silicon System Research Laboratories, NEC |
| 6th Author's Name | Tatsuya Kishi |
| 6th Author's Affiliation | Corporate Research & Development Center, Toshiba Corporation |
| 7th Author's Name | Sumio Ikegawa |
| 7th Author's Affiliation | Corporate Research & Development Center, Toshiba Corporation |
| 8th Author's Name | Nobuyuki Ishiwata |
| 8th Author's Affiliation | Silicon System Research Laboratories, NEC |
| 9th Author's Name | Kenji Tsuchida |
| 9th Author's Affiliation | SoC Research and Development Center, Semiconductor Company, Toshiba Corporation |
| 10th Author's Name | Shuichi Tahara |
| 10th Author's Affiliation | Silicon System Research Laboratories, NEC |
| Date | 2003/4/3 |
| Paper # | ICD2003-3 |
| Volume (vol) | vol.103 |
| Number (no) | 2 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |