| Presentation | 2003/2/27 Force-Directed Floorplan Synthesis with Rearrangement of Hierarchical Structure Masahiro OBARA, Yasuhiro TAKASHIMA, Mineo KANEKO, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Due to the increase of the number of components integrated into a single chip, hierarchical approach is now indispensable for designing layout. In such approach, a hierarchical structure is usually given as a consequence of top down design from the system level to the logic (circuit) level, or it is generated by some partitioner. However, a hierarchical structure, which is convenient for system level design to logic level design or is generated only based on topological information, is not always a good one for layout. Our challenge tackled in this paper is to find a hierarchical structure suitable for layout and its floorplan. The method proposed in this paper is the incorporation of modifications of hierarchical structure into Force-Directed floorplanning. With respect to the minimization of wire length between blocks, our method achieves 9.9 21.0 % improvement compared with a conventional topological partitioning followed by Force-Directed floorplanning. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Force-Directed Floorplanning / Hierarchical Structure / Partitioning |
| Paper # | VLD2002-148,ICD2002-213 |
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| Conference Information | |
| Committee | ICD |
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| Conference Date | 2003/2/27(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Integrated Circuits and Devices (ICD) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Force-Directed Floorplan Synthesis with Rearrangement of Hierarchical Structure |
| Sub Title (in English) | |
| Keyword(1) | Force-Directed Floorplanning |
| Keyword(2) | Hierarchical Structure |
| Keyword(3) | Partitioning |
| 1st Author's Name | Masahiro OBARA |
| 1st Author's Affiliation | School of Information Science, Japan Advanced Institute of Science and Technology() |
| 2nd Author's Name | Yasuhiro TAKASHIMA |
| 2nd Author's Affiliation | School of Information Science, Japan Advanced Institute of Science and Technology |
| 3rd Author's Name | Mineo KANEKO |
| 3rd Author's Affiliation | School of Information Science, Japan Advanced Institute of Science and Technology |
| Date | 2003/2/27 |
| Paper # | VLD2002-148,ICD2002-213 |
| Volume (vol) | vol.102 |
| Number (no) | 685 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |