Presentation 2003/1/23
Bare Die Testing Technology to Realize Ultra High Density Three Dimensional LSI Stacking Module
Michinobu TANIOKA, Yuji SHIRAI, Kazumi KOJIMA, Kenji TAKAHASHI,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) The ultra pitch probing technology that aims at the bare die testing is indispensable to realize the mass production of three-dimensional LSl module. The ultra fine pitch probe and the high accuracy prober were developed to achieve this technology. The material and structure of the probe tip were determined according to the contact material. The high accuracy prober achieved the probing accuracy of less than l .0μm that was half the accuracy of the commercial available prober by new mechanical structure. Consequently, The ultra pitch probing technology to 20μm pitch electrode was established on constant probing conditions using the new probe and prober.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) Three Dimensional Packaging / Known Good Die / Wafer Testing / Electrical Contact / Micro Probe / Wafer Prober
Paper #
Date of Issue

Conference Information
Committee ICD
Conference Date 2003/1/23(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Integrated Circuits and Devices (ICD)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Bare Die Testing Technology to Realize Ultra High Density Three Dimensional LSI Stacking Module
Sub Title (in English)
Keyword(1) Three Dimensional Packaging
Keyword(2) Known Good Die
Keyword(3) Wafer Testing
Keyword(4) Electrical Contact
Keyword(5) Micro Probe
Keyword(6) Wafer Prober
1st Author's Name Michinobu TANIOKA
1st Author's Affiliation Association of Super-Advanced Electronics Technologies (ASET)()
2nd Author's Name Yuji SHIRAI
2nd Author's Affiliation Association of Super-Advanced Electronics Technologies (ASET)
3rd Author's Name Kazumi KOJIMA
3rd Author's Affiliation Association of Super-Advanced Electronics Technologies (ASET)
4th Author's Name Kenji TAKAHASHI
4th Author's Affiliation Association of Super-Advanced Electronics Technologies (ASET)
Date 2003/1/23
Paper #
Volume (vol) vol.102
Number (no) 622
Page pp.pp.-
#Pages 6
Date of Issue