| Presentation | 2004/9/21 Speeding Up the Simulation of Ion Implantation with Analytic method at 3-Dimensional Process Simulator HySyProS M. Mochizuki, T. Uchida, M. Takenaka, S. Itoh, H. Ishikawa, M. Fujinaga, T. Wada, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We developed a new method in analyzing multilayer structure, and the calculation time of the ion implantation simulation with analytic method at 3-dimensional process simulator HySyProS was reduced. The bottleneck of reducing the calculation time was the analysis of the multilayer structure along the implantation beam, because analyzing layer structure costs much time and must be repeated about 1000 times at every analysis nodes. We decreased the number of times of the analysis, by dividing a plane perpendicular to the implantation beam to small triangles, and storing the intersections between the implantation beam which passes through the peaks of the small triangles and all material boundaries. The analysis node on the very top surface was used as the base of the triangulation. The topology of the structure was reflected to triangular area, and it prevented the degradation of the accuracy of the layer structure analysis. HySyProS became 1.8 times as faster as previous version at an ion implantation simulation in STI -MOSFET process with this improvement. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | 3-Dimensional Process Simulation / Ion Implantation / Analytic Method / Speeding Up / Multilayer / Layer Analysis |
| Paper # | VLD2004-39,SDM2004-163 |
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| Conference Information | |
| Committee | SDM |
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| Conference Date | 2004/9/21(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Chair | |
| Vice Chair | |
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| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Speeding Up the Simulation of Ion Implantation with Analytic method at 3-Dimensional Process Simulator HySyProS |
| Sub Title (in English) | |
| Keyword(1) | 3-Dimensional Process Simulation |
| Keyword(2) | Ion Implantation |
| Keyword(3) | Analytic Method |
| Keyword(4) | Speeding Up |
| Keyword(5) | Multilayer |
| Keyword(6) | Layer Analysis |
| 1st Author's Name | M. Mochizuki |
| 1st Author's Affiliation | Semiconductor Leading Edge Technologies, Inc.() |
| 2nd Author's Name | T. Uchida |
| 2nd Author's Affiliation | Semiconductor Leading Edge Technologies, Inc. |
| 3rd Author's Name | M. Takenaka |
| 3rd Author's Affiliation | Semiconductor Leading Edge Technologies, Inc. |
| 4th Author's Name | S. Itoh |
| 4th Author's Affiliation | Semiconductor Leading Edge Technologies, Inc. |
| 5th Author's Name | H. Ishikawa |
| 5th Author's Affiliation | Semiconductor Leading Edge Technologies, Inc. |
| 6th Author's Name | M. Fujinaga |
| 6th Author's Affiliation | Semiconductor Leading Edge Technologies, Inc. |
| 7th Author's Name | T. Wada |
| 7th Author's Affiliation | Semiconductor Leading Edge Technologies, Inc. |
| Date | 2004/9/21 |
| Paper # | VLD2004-39,SDM2004-163 |
| Volume (vol) | vol.104 |
| Number (no) | 324 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |