| Presentation | 2004/6/24 High Performance Low Noise CMOS Fabricated on Flattened (110) oriented Si Substrate(Session B5 Si-Devices I)(2004 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (AWAD 2004)) Tatsufumi Hamada, Akinobu Teramoto, Hiroshi Akahori, Keiichi Nii, Tomoyuki Suwa, Maaski Hirayama, Tadahiro Ohmi, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper investigated the CMOS characteristics on Si(11O) surface by using surface flattening process and radical oxidation technology. Surface micro-roughness on Si(110) surface increases by using conventional RCA Cleaning. We developed the Si(11O) surface flattening technology. By forming a MOS device on flattened Si(11O) surface, the high-speed and low 1/f noise p-MOSFET can be realized. Furthermore, the current drivability of p-MOS and n-MOS has balanced in the CMOS (balanced CMOS) on Si(11O) surface can be also realized. These are very useful to the analog/digital mixed signal circuits. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | orientation / surface flattening / Si(110) surface / MOSFET / micro-roughness / bakanced-CMOS |
| Paper # | ED2004-81,SDM2004-93 |
| Date of Issue |
| Conference Information | |
| Committee | SDM |
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| Conference Date | 2004/6/24(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | High Performance Low Noise CMOS Fabricated on Flattened (110) oriented Si Substrate(Session B5 Si-Devices I)(2004 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (AWAD 2004)) |
| Sub Title (in English) | |
| Keyword(1) | orientation |
| Keyword(2) | surface flattening |
| Keyword(3) | Si(110) surface |
| Keyword(4) | MOSFET |
| Keyword(5) | micro-roughness |
| Keyword(6) | bakanced-CMOS |
| 1st Author's Name | Tatsufumi Hamada |
| 1st Author's Affiliation | Department of Electronic Engineering, Graduate School of Engineering, Tohoku University() |
| 2nd Author's Name | Akinobu Teramoto |
| 2nd Author's Affiliation | New Industry Creation Hatchery Center, Tohoku University |
| 3rd Author's Name | Hiroshi Akahori |
| 3rd Author's Affiliation | Department of Electronic Engineering, Graduate School of Engineering, Tohoku University |
| 4th Author's Name | Keiichi Nii |
| 4th Author's Affiliation | New Industry Creation Hatchery Center, Tohoku University |
| 5th Author's Name | Tomoyuki Suwa |
| 5th Author's Affiliation | Department of Electronic Engineering, Graduate School of Engineering, Tohoku University |
| 6th Author's Name | Maaski Hirayama |
| 6th Author's Affiliation | New Industry Creation Hatchery Center, Tohoku University |
| 7th Author's Name | Tadahiro Ohmi |
| 7th Author's Affiliation | New Industry Creation Hatchery Center, Tohoku University |
| Date | 2004/6/24 |
| Paper # | ED2004-81,SDM2004-93 |
| Volume (vol) | vol.104 |
| Number (no) | 156 |
| Page | pp.pp.- |
| #Pages | 4 |
| Date of Issue | |