| Presentation | 2004/6/23 3D Cell Structure for Low Power and High Performance DRAM : FCAT (Fin-Channel-Array Transistor)(Session A1 Si Novel Device and Process)(2004 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (AWAD 2004)) Jong-Wook Lee, Deok-Hyung Lee, Yu-Gyun Shin, U-In Chung, Joo-Tae Moon, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | Fin-Type cell structure, called Fin-Channel-Array Transistor (FCAT), has been proposed and successfully demonstrated for low power and high performance DRAM devices. FCAT structure is bulk-compatible and can be easily achieved only by recessing the dielectric. To our knowledge, FinFET devices have been applied to develop 512Mb DRAM with sub-70 nm technology for the first time. lt is found that FCAT has a remarkable performance such as excellent short channel effect (SCE) with DIBL of about 13 mV, extremely low sub-threshold swing (SS) of about 75mV/dec, and a high cell current and remarkably low sub-threshold leakage current (～0.2fA/cell). |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | DRAM / FinFET / FCAT / SCE |
| Paper # | ED2004-49,SDM2004-61 |
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| Conference Information | |
| Committee | SDM |
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| Conference Date | 2004/6/23(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | 3D Cell Structure for Low Power and High Performance DRAM : FCAT (Fin-Channel-Array Transistor)(Session A1 Si Novel Device and Process)(2004 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (AWAD 2004)) |
| Sub Title (in English) | |
| Keyword(1) | DRAM |
| Keyword(2) | FinFET |
| Keyword(3) | FCAT |
| Keyword(4) | SCE |
| 1st Author's Name | Jong-Wook Lee |
| 1st Author's Affiliation | Memory Division, Samsung Electronics Co.() |
| 2nd Author's Name | Deok-Hyung Lee |
| 2nd Author's Affiliation | Memory Division, Samsung Electronics Co. |
| 3rd Author's Name | Yu-Gyun Shin |
| 3rd Author's Affiliation | Memory Division, Samsung Electronics Co. |
| 4th Author's Name | U-In Chung |
| 4th Author's Affiliation | Memory Division, Samsung Electronics Co. |
| 5th Author's Name | Joo-Tae Moon |
| 5th Author's Affiliation | Memory Division, Samsung Electronics Co. |
| Date | 2004/6/23 |
| Paper # | ED2004-49,SDM2004-61 |
| Volume (vol) | vol.104 |
| Number (no) | 155 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |