| Presentation | 2003/10/14 Electrical Characteristics of sub-100 nm CMOS on (110) surface Si substrate Hidetatsu NAKAMURA, Tatsuya EZAKI, Toshiyuki IWAMOTO, Mitsuhiro TOGO, Takeo IKEZAWA, Nobuyuki IKARASHI, Masami HANE, Toyoji YAMAMOTO, |
|
|---|---|---|
| PDF Download Page | PDF download Page Link | |
| Abstract(in Japanese) | (See Japanese page) | |
| Abstract(in English) | We investigated the low field mobility and short channel characteristics of MOSFETs on (110) surface Si substrates with various channel directions from the viewpoints of experiment and numerical simulation. We found that the mobility ratio (μ_<(110)>/μ_<(001)>) does not depend on the vertical electric field due to the identical surface roughness for (110) and (001) substrates. We verified mobility enhancement and its channel direction dependence by detailed carrier transport simulation using a full band model and relaxation time approximation. We obtained good V_ | lowering characteristics due to the suppression of channeling at SD extension by implant sequence control. Our results showed that the improvement in propagation delay time (CV/I) and on-current ratio of nMOS to pMOS (I^ |
| Keyword(in Japanese) | (See Japanese page) | |
| Keyword(in English) | MOSFET / (110) surface Si substrate / mobility / channel direction / surface roughness / channeling / short channel characteristics / CMOS performance | |
| Paper # | SDM2003-175 | |
| Date of Issue |
| Conference Information | |
| Committee | SDM |
|---|---|
| Conference Date | 2003/10/14(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
|---|---|
| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Electrical Characteristics of sub-100 nm CMOS on (110) surface Si substrate |
| Sub Title (in English) | |
| Keyword(1) | MOSFET |
| Keyword(2) | (110) surface Si substrate |
| Keyword(3) | mobility |
| Keyword(4) | channel direction |
| Keyword(5) | surface roughness |
| Keyword(6) | channeling |
| Keyword(7) | short channel characteristics |
| Keyword(8) | CMOS performance |
| 1st Author's Name | Hidetatsu NAKAMURA |
| 1st Author's Affiliation | Silicon Systems Research Labs., NEC Corporation() |
| 2nd Author's Name | Tatsuya EZAKI |
| 2nd Author's Affiliation | Silicon Systems Research Labs., NEC Corporation |
| 3rd Author's Name | Toshiyuki IWAMOTO |
| 3rd Author's Affiliation | Silicon Systems Research Labs., NEC Corporation |
| 4th Author's Name | Mitsuhiro TOGO |
| 4th Author's Affiliation | Silicon Systems Research Labs., NEC Corporation |
| 5th Author's Name | Takeo IKEZAWA |
| 5th Author's Affiliation | Platform Software Division, NEC Infomatec Systems, Ltd. |
| 6th Author's Name | Nobuyuki IKARASHI |
| 6th Author's Affiliation | Silicon Systems Research Labs., NEC Corporation |
| 7th Author's Name | Masami HANE |
| 7th Author's Affiliation | Silicon Systems Research Labs., NEC Corporation |
| 8th Author's Name | Toyoji YAMAMOTO |
| 8th Author's Affiliation | Silicon Systems Research Labs., NEC Corporation |
| Date | 2003/10/14 |
| Paper # | SDM2003-175 |
| Volume (vol) | vol.103 |
| Number (no) | 374 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |