Presentation	2003/8/15 Sub-50-nm CMOS Device Technologies Hitoshi WAKABAYASHI, Kiyoshi TAKEUCHI, Toyoji YAMAMOTO, Tohru MOGAMI,
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Abstract(in English)	Sub-50-nm CMOS devices are demonstrated using a steep halo, which is formed by high-ramp-rate spike annealing (HRR-SA) and reverse-order S/D (R-S/D) formation. For an off current less than 300 nA/μm, 24/33-nm n/pMOSFETs have high drive currents of 800/400 μA/μm at 1.2 V and T^_ = 2.5 nm, respectively. From an energy-delay product dependence on a supply voltage using characteristics of down to 24-nm MOSFETs, a trade-off between the performance and power consumption will be serious significantly at sub-1.0-V regime, due to high impurity concentration of halo. Therefore it is important to investigate a double gate electrode technology (e.g. FinFET) taking into consideration of the short-channel effect (SCE).
Keyword(in Japanese)	(See Japanese page)
Keyword(in English)	CMOS / Sub-50-nm Gate Electrode / Source-Drain Extensions / Halo / Power Consumption / Double gate electrode / FinFET
Paper #	SDM2003-143,ICD2003-76
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Conference Information
Committee	SDM
Conference Date	2003/8/15(1days)
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Paper Information
Registration To	Silicon Device and Materials (SDM)
Language	JPN
Title (in Japanese)	(See Japanese page)
Sub Title (in Japanese)	(See Japanese page)
Title (in English)	Sub-50-nm CMOS Device Technologies
Sub Title (in English)
Keyword(1)	CMOS
Keyword(2)	Sub-50-nm Gate Electrode
Keyword(3)	Source-Drain Extensions
Keyword(4)	Halo
Keyword(5)	Power Consumption
Keyword(6)	Double gate electrode
Keyword(7)	FinFET
1st Author's Name	Hitoshi WAKABAYASHI
1st Author's Affiliation	Silicon Systems Research Laboratories, NEC Corporation()
2nd Author's Name	Kiyoshi TAKEUCHI
2nd Author's Affiliation	Silicon Systems Research Laboratories, NEC Corporation
3rd Author's Name	Toyoji YAMAMOTO
3rd Author's Affiliation	Silicon Systems Research Laboratories, NEC Corporation
4th Author's Name	Tohru MOGAMI
4th Author's Affiliation	Silicon Systems Research Laboratories, NEC Corporation
Date	2003/8/15
Paper #	SDM2003-143,ICD2003-76
Volume (vol)	vol.103
Number (no)	260
Page	pp.pp.-
#Pages	5
Date of Issue