Presentation 2003/8/15
A Memory Using One-Transistor Gain Cell on SOI(FBC) with Performance Suitable for Embedded DRAM's : Measurement Results of Cell Characteristics and Memory Performance
Takashi Ohsawa, Tomoki Higashi, Katsuyuki Fujita, Tamio Ikehashi, Takeshi Kajiyama, Yoshiaki Fukuzumi, Tomoaki Shino, Hiroaki Yamada, Hiroomi Nakajima, Yoshihiro Minarni, Takashi Yamada, Kazumi Inoh, Takeshi Hamamoto,
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Abstract(in Japanese) (See Japanese page)
Abstract(in English) A 288Kbit memory chip featuring a one-transistor gain cell on SOI of the size 0.21 μm^2 (7F^2 with F=0.175 μm) which we named the floating body transistor cell(FBC) is presented and basic characteristics of the cell and the memory chip performance are disclosed. The threshold voltages of a cell transistor in the chip for the data "1" and for the data "0" are measured by using a direct access test circuit and a fail bit map for the 96Kbit array is obtained. A sensing scheme which was designed to eliminate the effect of cell characteristics variation due to process and temperature fluctuation as common mode noise is verified to be working and the random access time is measured to be less than 100ns. The characteristics of data hold demonstrate that the FBC can satisfy retention time specifications for some embedded memories. The access time and the data retention time show that the FBC has a potential to be used as a future embedded DRAM memory cell.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) SOI / FBC / Gain Cell / Capacitor-less DRAM / Embedded DRAM
Paper # SDM2003-137,ICD2003-70
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Conference Information
Committee SDM
Conference Date 2003/8/15(1days)
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Paper Information
Registration To Silicon Device and Materials (SDM)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Memory Using One-Transistor Gain Cell on SOI(FBC) with Performance Suitable for Embedded DRAM's : Measurement Results of Cell Characteristics and Memory Performance
Sub Title (in English)
Keyword(1) SOI
Keyword(2) FBC
Keyword(3) Gain Cell
Keyword(4) Capacitor-less DRAM
Keyword(5) Embedded DRAM
1st Author's Name Takashi Ohsawa
1st Author's Affiliation TOSHIBA Corporation Semiconductor Company()
2nd Author's Name Tomoki Higashi
2nd Author's Affiliation TOSHIBA Microelectronics Corporation
3rd Author's Name Katsuyuki Fujita
3rd Author's Affiliation TOSHIBA Corporation Semiconductor Company
4th Author's Name Tamio Ikehashi
4th Author's Affiliation TOSHIBA Corporation Semiconductor Company
5th Author's Name Takeshi Kajiyama
5th Author's Affiliation TOSHIBA Corporation Semiconductor Company
6th Author's Name Yoshiaki Fukuzumi
6th Author's Affiliation TOSHIBA Corporation Semiconductor Company
7th Author's Name Tomoaki Shino
7th Author's Affiliation TOSHIBA Corporation Semiconductor Company
8th Author's Name Hiroaki Yamada
8th Author's Affiliation TOSHIBA Corporation Semiconductor Company
9th Author's Name Hiroomi Nakajima
9th Author's Affiliation TOSHIBA Corporation Semiconductor Company
10th Author's Name Yoshihiro Minarni
10th Author's Affiliation TOSHIBA Corporation Semiconductor Company
11th Author's Name Takashi Yamada
11th Author's Affiliation TOSHIBA Corporation Semiconductor Company
12th Author's Name Kazumi Inoh
12th Author's Affiliation TOSHIBA Corporation Semiconductor Company
13th Author's Name Takeshi Hamamoto
13th Author's Affiliation TOSHIBA Corporation Semiconductor Company
Date 2003/8/15
Paper # SDM2003-137,ICD2003-70
Volume (vol) vol.103
Number (no) 260
Page pp.pp.-
#Pages 6
Date of Issue