| Presentation | 2003/8/15 5000ppm Spread Spectrum Transmitter and Receiver with Self-running Phase interpolator for 3Gbps Serial ATA Morishige AOYAMA, Kazuo OGASAWARA, Mitsutoshi Sugawara, Terukazu ISHIBASHI, Takashi ISHIBASHI, Shinichi SHIMOYAMA, Kouichi YAMAGUCHI, Tomonori YANAGITA, Toshihiro NOMA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We have developed 5000ppm spread spectrum transmitter and receiver for 3Gbps serial ATA. It includes a spread spectrum carrier generator for transmitter and a spread spectrum cock and data recovery for receiver. Both of them are constructed from a self-running phase interpolator to realize high stability and low power dissipation. The test chip was fabricated with a 0.15um, 1.5V CMOS process. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Serial ATA / Spread Spectrum Carrier Generator / clock and data recovery / CMOS / PLL |
| Paper # | SDM2003-135,ICD2003-68 |
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| Conference Information | |
| Committee | SDM |
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| Conference Date | 2003/8/15(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
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| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | 5000ppm Spread Spectrum Transmitter and Receiver with Self-running Phase interpolator for 3Gbps Serial ATA |
| Sub Title (in English) | |
| Keyword(1) | Serial ATA |
| Keyword(2) | Spread Spectrum Carrier Generator |
| Keyword(3) | clock and data recovery |
| Keyword(4) | CMOS |
| Keyword(5) | PLL |
| 1st Author's Name | Morishige AOYAMA |
| 1st Author's Affiliation | 1^ |
| 2nd Author's Name | Kazuo OGASAWARA |
| 2nd Author's Affiliation | 1^ |
| 3rd Author's Name | Mitsutoshi Sugawara |
| 3rd Author's Affiliation | Broad Band LSI Technology, NEC Electronics America, Inc. |
| 4th Author's Name | Terukazu ISHIBASHI |
| 4th Author's Affiliation | IP Core Development Division., NEC Micro Systems Ltd. |
| 5th Author's Name | Takashi ISHIBASHI |
| 5th Author's Affiliation | General-purpose LSI Division, NEC Micro Systems Ltd. |
| 6th Author's Name | Shinichi SHIMOYAMA |
| 6th Author's Affiliation | IP Core Development Division., NEC Micro Systems Ltd. |
| 7th Author's Name | Kouichi YAMAGUCHI |
| 7th Author's Affiliation | Silicon Systems Res. Labs., NEC Corporation |
| 8th Author's Name | Tomonori YANAGITA |
| 8th Author's Affiliation | Silicon Systems Res. Labs., NEC Corporation |
| 9th Author's Name | Toshihiro NOMA |
| 9th Author's Affiliation | 1^ |
| Date | 2003/8/15 |
| Paper # | SDM2003-135,ICD2003-68 |
| Volume (vol) | vol.103 |
| Number (no) | 260 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |