| Presentation | 2003/8/15 A 39-to-45-Gbit/s Multi-Data-Rate Clock and Data Recovery Circuit with a New Lock Detector Hideyuki NOSAKA, Eiichi SANO, Kiyoshi ISHII, Minoru IDA, Kenji KURISHIMA, Shoji YAMAHATA, Tsugumichi SHIBATA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We present a clock and data recovery circuit that pulls in throughout a 39-45-Gbit/s range. The CDR 1C was fabricated using InP/InGaAs HBTs. Error-free operation and wide eye opening were confirmed for 40, 43, and 45-Gbit/s PRBS with a word length of 2^<31>-1. By attaching a frequency search and phase control (FSPC) circuit to the chip, the CDR circuit pulls in throughout a 39-45-Gbit/s range. The peak-to-peak and RMS clock jitter were 3.6 and 0.48 ps for 43.01841-Gbit/s 2^<31>-1PRBS. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | clock recovery / phase-locked loop / InP HBT / serial link |
| Paper # | SDM2003-134,ICD2003-67 |
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| Conference Information | |
| Committee | SDM |
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| Conference Date | 2003/8/15(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Silicon Device and Materials (SDM) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A 39-to-45-Gbit/s Multi-Data-Rate Clock and Data Recovery Circuit with a New Lock Detector |
| Sub Title (in English) | |
| Keyword(1) | clock recovery |
| Keyword(2) | phase-locked loop |
| Keyword(3) | InP HBT |
| Keyword(4) | serial link |
| 1st Author's Name | Hideyuki NOSAKA |
| 1st Author's Affiliation | NTT Photonics Laboratories, NTT Corporation() |
| 2nd Author's Name | Eiichi SANO |
| 2nd Author's Affiliation | NTT Photonics Laboratories, NTT Corporation:(Present address)Research Center for Integrated Quantum Electronics, Hokkaido university |
| 3rd Author's Name | Kiyoshi ISHII |
| 3rd Author's Affiliation | NTT Photonics Laboratories, NTT Corporation |
| 4th Author's Name | Minoru IDA |
| 4th Author's Affiliation | NTT Photonics Laboratories, NTT Corporation |
| 5th Author's Name | Kenji KURISHIMA |
| 5th Author's Affiliation | NTT Photonics Laboratories, NTT Corporation |
| 6th Author's Name | Shoji YAMAHATA |
| 6th Author's Affiliation | NTT Photonics Laboratories, NTT Corporation:(Present address)ATR |
| 7th Author's Name | Tsugumichi SHIBATA |
| 7th Author's Affiliation | NTT Photonics Laboratories, NTT Corporation |
| Date | 2003/8/15 |
| Paper # | SDM2003-134,ICD2003-67 |
| Volume (vol) | vol.103 |
| Number (no) | 260 |
| Page | pp.pp.- |
| #Pages | 5 |
| Date of Issue | |