| Presentation | 2002/11/8 Study of ESD Examination Method for Charged Device Model Munehiko MIGUCHI, Yoshiharu KATAOKA, Shinji NAKANO, Tetsuaki WADA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | The ESD testing method of the semiconductor device is classified broadly into Human Body Model (Machine Model as alternative test) and Charged Device Model. Regarding Charged Device Model, the discharge method using a mercury relay is standardized in Japan as JEITA standard. On the other hand, the aerial discharge method using a discharge plate is standardized in U.S. as JEDEC standard. Generally, charging voltage represents the ESD immunity for the Charged Device Model. In this paper, we clarified that ESD failure was strongly depended on the peak current (Ip) value of discharge waveform, not discharge method or charging voltage. And we indicated the future direction of standardization by applying this result. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | ESD / CDM / FICDM |
| Paper # | R2002-37 |
| Date of Issue |
| Conference Information | |
| Committee | R |
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| Conference Date | 2002/11/8(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
| Chair | |
| Vice Chair | |
| Secretary | |
| Assistant | |
| Paper Information | |
| Registration To | Reliability(R) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Study of ESD Examination Method for Charged Device Model |
| Sub Title (in English) | |
| Keyword(1) | ESD |
| Keyword(2) | CDM |
| Keyword(3) | FICDM |
| 1st Author's Name | Munehiko MIGUCHI |
| 1st Author's Affiliation | Matsushita Electronics Industry Semiconductor Corporation Quality Laboratory() |
| 2nd Author's Name | Yoshiharu KATAOKA |
| 2nd Author's Affiliation | Matsushita Electronics Industry Semiconductor Corporation Quality Laboratory |
| 3rd Author's Name | Shinji NAKANO |
| 3rd Author's Affiliation | Matsushita Electronics Industry Semiconductor Corporation Quality Laboratory |
| 4th Author's Name | Tetsuaki WADA |
| 4th Author's Affiliation | Matsushita Electronics Industry Semiconductor Corporation Quality Laboratory |
| Date | 2002/11/8 |
| Paper # | R2002-37 |
| Volume (vol) | vol.102 |
| Number (no) | 454 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |