Presentation 2004/2/27
Development of the Education Environment for CPU Architecture
Junichi SASAKI, Seiko NISHITA, Jun AKIWA, Michiko HARA, Norio HARADA,
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Abstract(in English) We design and develop a device for learning CPU architecture and its behavior. Our device is regarded as a CPU which lacks control unit, and it has buttons, switches and LEDs, by which learners can control CPU and study it's structure, data flow, and the role of control unit. We implement the device with CPLD and Verilog HDL. Moreover, We design a softwere tool that helps students design and customize the specification of CPU. Students can make certain of the behavior of their CPU, the role of datapath elements, and the constitution of the CPU.
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Keyword(in English) Conputer Architecture / learner support / teaching material / CPU
Paper # ET2003-99
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Conference Date 2004/2/27(1days)
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Registration To Educational Technology (ET)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Development of the Education Environment for CPU Architecture
Sub Title (in English)
Keyword(1) Conputer Architecture
Keyword(2) learner support
Keyword(3) teaching material
Keyword(4) CPU
1st Author's Name Junichi SASAKI
1st Author's Affiliation Graduate School of Engineering Takushoku University()
2nd Author's Name Seiko NISHITA
2nd Author's Affiliation Dept. of Computer Science, Faculty of Engineering, Takushoku University
3rd Author's Name Jun AKIWA
3rd Author's Affiliation Dept. of Computer Science, Faculty of Engineering, Takushoku University
4th Author's Name Michiko HARA
4th Author's Affiliation Dept. of Computer Science, Faculty of Engineering, Takushoku University
5th Author's Name Norio HARADA
5th Author's Affiliation Dept. of Computer Science, Faculty of Engineering, Takushoku University
Date 2004/2/27
Paper # ET2003-99
Volume (vol) vol.103
Number (no) 697
Page pp.pp.-
#Pages 6
Date of Issue