| Presentation | 2004/3/11 UMLを用いた実時間・高信頼性組込みシステムの上位設計についての検討(<特集>実時間処理,組込システム及び一般) Ken MATSUI, Satoshi KOMATSU, Masahiro FUJITA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In this paper, we examine and propose the process of the high-level system design of a real-time embedded system using UML (Unified Modeling Language). In this process, we plan to verify the design at high-level, and reduce the re-design that arises from the failure in the previous design. In addition, we consider performing hardware/software co-design and using "SCE (System-on-Chip Environment)" as the middle-level system design tool for that purpose. By using this process in the high-level system design of an embedded system, we can design and verify a system efficiently. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | UML / Embedded System / High-level system design / HW/SW co-design / SCE (System-On-Chip Environment) |
| Paper # | CPSY2003-50 |
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| Conference Information | |
| Committee | CPSY |
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| Conference Date | 2004/3/11(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Computer Systems (CPSY) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | |
| Sub Title (in English) | |
| Keyword(1) | UML |
| Keyword(2) | Embedded System |
| Keyword(3) | High-level system design |
| Keyword(4) | HW/SW co-design |
| Keyword(5) | SCE (System-On-Chip Environment) |
| 1st Author's Name | Ken MATSUI |
| 1st Author's Affiliation | Department of Electronics Engineering, Undergraduate School of Engineering, University of Tokyo() |
| 2nd Author's Name | Satoshi KOMATSU |
| 2nd Author's Affiliation | VLSI Design and Education Center, University of Tokyo |
| 3rd Author's Name | Masahiro FUJITA |
| 3rd Author's Affiliation | Department of Electronics Engineering, Graduate School of Engineering, University of Tokyo |
| Date | 2004/3/11 |
| Paper # | CPSY2003-50 |
| Volume (vol) | vol.103 |
| Number (no) | 735 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |