| Presentation | 2004/1/15 Design of Producer-order Parallel Queue Processor Architecture Arsenij MARKOVSKIJ, Masahiro SOWA, Ben ABDERAZEK, Soichi SHIGETA, Tsutomu YOSHINAGA, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In this paper we describe the design of Producer-order Parallel Queue Processor architecture. It is based on Producer-order Queue Computational Model, which uses Queue (FIFO memory) instead of registers as an intermediate storage of operands. Short program length, ILP orientation, and simple instruction issue mechanism are its main advantages, especially if the target is embedded system. Our processor successfully deals with complexity of superscalar machines. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Queue Computational Model / Parallel Queue Processor / ILP / code size |
| Paper # | VLD2003-117,CPSY2003-26 |
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| Conference Information | |
| Committee | CPSY |
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| Conference Date | 2004/1/15(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
| Topics (in English) | |
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| Vice Chair | |
| Secretary | |
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| Paper Information | |
| Registration To | Computer Systems (CPSY) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Design of Producer-order Parallel Queue Processor Architecture |
| Sub Title (in English) | |
| Keyword(1) | Queue Computational Model |
| Keyword(2) | Parallel Queue Processor |
| Keyword(3) | ILP |
| Keyword(4) | code size |
| 1st Author's Name | Arsenij MARKOVSKIJ |
| 1st Author's Affiliation | Graduate School of Information Systems, University of Electro-Communications() |
| 2nd Author's Name | Masahiro SOWA |
| 2nd Author's Affiliation | Graduate School of Information Systems, University of Electro-Communications |
| 3rd Author's Name | Ben ABDERAZEK |
| 3rd Author's Affiliation | Graduate School of Information Systems, University of Electro-Communications |
| 4th Author's Name | Soichi SHIGETA |
| 4th Author's Affiliation | Graduate School of Information Systems, University of Electro-Communications |
| 5th Author's Name | Tsutomu YOSHINAGA |
| 5th Author's Affiliation | Graduate School of Information Systems, University of Electro-Communications |
| Date | 2004/1/15 |
| Paper # | VLD2003-117,CPSY2003-26 |
| Volume (vol) | vol.103 |
| Number (no) | 580 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |