Presentation 2002/11/21
Test data volume reduction using statistical encoding for multiple scan chain designs
Kenjiro Taniguchi, Kohei Miyase, Seiji Kajihara, Irith Pomeranz, Sudhakar M. Reddy,
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Abstract(in English) In this paper we propose a new method of test data compression for multiple scan chain designs. The proposed method consists of two phases of data compression. In the first phase, ATPG test vectors applied to multiple scan chains are encoded to reduce the number of test input pins and thus reduce the test data volume. In the second phase, the encoded test vectors are compressed further using statistical encoding to reduce the length of the test sequences applied to each test pin. This reduces test loading time and test data volume. Experimental results for large ISCAS-89 benchmark circuits show that the proposed method reduced the test data volume to 21.5% on average.
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Keyword(in English) test data compression / don't-care identification / multiple scan chain designs / Huffman's encoding / SoC testing
Paper # CPSY2002-65
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Committee CPSY
Conference Date 2002/11/21(1days)
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Registration To Computer Systems (CPSY)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Test data volume reduction using statistical encoding for multiple scan chain designs
Sub Title (in English)
Keyword(1) test data compression
Keyword(2) don't-care identification
Keyword(3) multiple scan chain designs
Keyword(4) Huffman's encoding
Keyword(5) SoC testing
1st Author's Name Kenjiro Taniguchi
1st Author's Affiliation Department of Computer Sciences and Electronics, Kyushu Institute of Technology()
2nd Author's Name Kohei Miyase
2nd Author's Affiliation Department of Computer Sciences and Electronics, Kyushu Institute of Technology
3rd Author's Name Seiji Kajihara
3rd Author's Affiliation Department of Computer Sciences and Electronics, Kyushu Institute of Technology:Center for Microelectronics Systems, Kyushu Institute of Technology
4th Author's Name Irith Pomeranz
4th Author's Affiliation School of Electrical and Computer Engineering, Purdue University
5th Author's Name Sudhakar M. Reddy
5th Author's Affiliation Electrical and Computer Engineering Department, University of Iowa
Date 2002/11/21
Paper # CPSY2002-65
Volume (vol) vol.102
Number (no) 478
Page pp.pp.-
#Pages 6
Date of Issue