Presentation 2004/1/16
A Method of Memory Allocation for Indirect Addressing DSPs with Parallel Data Transfer
Masato SUDA, Yuhei KANEKO, Takefumi MIYOSHI, Nobuhiko SUGINO,
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Abstract(in English) In many of DSPs, two operands of their multiplier can be sent from separate memory pages in one instruction cycle, where each memory page is accessed by indirect addressing with auto-modification. In order to derive efficient program codes for such DSPs, memory page assignment and address allocation of program variables are quite important. In this article, these two problems are simultaneously formulated by use of the graph representation, so that both page faults and auto-modification overheads are evaluated in terms of instruction cycles. By use of this graph representation, an existing memory allocation method is extended by additional page assignment part. The proposed method is applied to several examples, and its effectiveness shown by the derived results.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) DSP / memory page assignment / memory allocation / indirect addressing
Paper # CAS2003-100
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Committee CAS
Conference Date 2004/1/16(1days)
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Registration To Circuits and Systems (CAS)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) A Method of Memory Allocation for Indirect Addressing DSPs with Parallel Data Transfer
Sub Title (in English)
Keyword(1) DSP
Keyword(2) memory page assignment
Keyword(3) memory allocation
Keyword(4) indirect addressing
1st Author's Name Masato SUDA
1st Author's Affiliation Department of Advanced Applied Electronics, Tokyo Institute of Techology()
2nd Author's Name Yuhei KANEKO
2nd Author's Affiliation Department of Advanced Applied Electronics, Tokyo Institute of Techology
3rd Author's Name Takefumi MIYOSHI
3rd Author's Affiliation Department of Advanced Applied Electronics, Tokyo Institute of Techology
4th Author's Name Nobuhiko SUGINO
4th Author's Affiliation Department of Advanced Applied Electronics, Tokyo Institute of Techology
Date 2004/1/16
Paper # CAS2003-100
Volume (vol) vol.103
Number (no) 569
Page pp.pp.-
#Pages 6
Date of Issue