| Presentation | 2003/10/31 New Stochastic Bit-stream for Accurate Multiplication Makoto FUKUDA, c-k pham, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In this paper, we propose a stochastic bit-stream with high accurate multiplication. As a result, the RMS error of a stochastic multiplication by using GLFSR as a random number generator is reduced. The proposed synapse multiplier can be realized with a smaller circuit and having higher accuracy in comparison with the Deterministic Bit-stream which has been reported previously. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | Neural Network / Stochastic bit-stream / Deterministic bit-stream / FPGA / LFSR / GLFSR |
| Paper # | CAS2003-84,CST2003-27 |
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| Conference Information | |
| Committee | CAS |
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| Conference Date | 2003/10/31(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Vice Chair | |
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| Paper Information | |
| Registration To | Circuits and Systems (CAS) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | New Stochastic Bit-stream for Accurate Multiplication |
| Sub Title (in English) | |
| Keyword(1) | Neural Network |
| Keyword(2) | Stochastic bit-stream |
| Keyword(3) | Deterministic bit-stream |
| Keyword(4) | FPGA |
| Keyword(5) | LFSR |
| Keyword(6) | GLFSR |
| 1st Author's Name | Makoto FUKUDA |
| 1st Author's Affiliation | Dept. of Electronic Engineering, University of electro-communications() |
| 2nd Author's Name | c-k pham |
| 2nd Author's Affiliation | Dept. of Electronic Engineering, University of electro-communications |
| Date | 2003/10/31 |
| Paper # | CAS2003-84,CST2003-27 |
| Volume (vol) | vol.103 |
| Number (no) | 404 |
| Page | pp.pp.- |
| #Pages | 4 |
| Date of Issue | |