| Presentation | 2002/6/21 A VLSI implementation of a word recognition system for low-power design Shingo Yoshizawa, Yoshikazu Miyanaga, Norinobu Yoshida, Naoya Wada, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | This paper reports a VLSI implementation of a HMM based speech recognition system for low-power VLSI design. Output probability calculation is the most computationally expensive part of continuous HMM (CHMM) based speech recognition. The proposed architecture calculates the output probability with parallel and pipeline processing. It enables to reduce memory access and have high computing efficiency. They are effective in low-power design. We have fabricated a chip of the word speech recognition system based on the proposed architecture. The implemented system can achieve a real time response with lower clock in a middle size vocabulary recognition task (100-1000 words) by using this technique. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | VLSI / low-power design / HMM / isolated word speech recognition / memory access |
| Paper # | CAS2002-28 |
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| Conference Information | |
| Committee | CAS |
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| Conference Date | 2002/6/21(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Circuits and Systems (CAS) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | A VLSI implementation of a word recognition system for low-power design |
| Sub Title (in English) | |
| Keyword(1) | VLSI |
| Keyword(2) | low-power design |
| Keyword(3) | HMM |
| Keyword(4) | isolated word speech recognition |
| Keyword(5) | memory access |
| 1st Author's Name | Shingo Yoshizawa |
| 1st Author's Affiliation | Graduate School of Engineering, Hokkaido Unversity() |
| 2nd Author's Name | Yoshikazu Miyanaga |
| 2nd Author's Affiliation | Graduate School of Engineering, Hokkaido Unversity |
| 3rd Author's Name | Norinobu Yoshida |
| 3rd Author's Affiliation | Graduate School of Engineering, Hokkaido Unversity |
| 4th Author's Name | Naoya Wada |
| 4th Author's Affiliation | Graduate School of Engineering, Hokkaido Unversity |
| Date | 2002/6/21 |
| Paper # | CAS2002-28 |
| Volume (vol) | vol.102 |
| Number (no) | 162 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |