| Presentation | 2002/6/20 Clustering Based Clock Scheduling in Consideration of Clock Tree Length Hajime YAMAZAKI, Atsushi TAKAHASHI, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | In order to achieve a shorter clock period by a clock tree with less wire length and less power consumption, a clustering based clock scheduling algorithm was proposed. In the algorithm, first registers are partitioned into clusters by their locations, and then clusters are modified to improve the clock period by moving a critical register with respect to the clock period to a near or a new cluster. However, in the modification of clusters, the required wire length in each cluster is not considered though the maximum radius of each cluster is maintained. Thus, the sum of intra-cluster wire length tends to be large. In this paper, the algorithm is enhanced to take the required wire length in each cluster into account in the modification of clusters. In experiments, the validity of the enhancement is confirmed. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | semi-synchronous circuit / clock-tree / clock schedule / cluster |
| Paper # | CAS2002-21 |
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| Conference Information | |
| Committee | CAS |
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| Conference Date | 2002/6/20(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Circuits and Systems (CAS) |
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| Language | JPN |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | Clustering Based Clock Scheduling in Consideration of Clock Tree Length |
| Sub Title (in English) | |
| Keyword(1) | semi-synchronous circuit |
| Keyword(2) | clock-tree |
| Keyword(3) | clock schedule |
| Keyword(4) | cluster |
| 1st Author's Name | Hajime YAMAZAKI |
| 1st Author's Affiliation | Department of Communications and Integrated Systems, Tokyo Institute of Technology() |
| 2nd Author's Name | Atsushi TAKAHASHI |
| 2nd Author's Affiliation | Department of Communications and Integrated Systems, Tokyo Institute of Technology |
| Date | 2002/6/20 |
| Paper # | CAS2002-21 |
| Volume (vol) | vol.102 |
| Number (no) | 161 |
| Page | pp.pp.- |
| #Pages | 6 |
| Date of Issue | |