Presentation | 2002/6/20 A Rectilinear Steiner Problem Using Genetic Algorithms in 3-D VLSI Kenichi TOYOHARA, Kenji SEO, Michiroh OHMURA, |
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Abstract(in English) | With the advance of VLSI process technology, 3-D MCMs, and 3D VLSI, in which active layers are stacked, has been the focus of attention. In this paper, we propose a method that obtains a 3-D rectilinear Steiner tree that minimizes the total wire length and the radius in 3-D VLSI using genetic algorithms. In this method, we obtain a Euclidian minimum spanning tree for the terminals with 3-D coordinates, and then we obtain the 3-D rectilinear Steiner tree by replacing each pair of terminals in the tree with segments that are parallel to X, Y, or Z-axis. In this paper, we describe the proposed method and the simulation results. |
Keyword(in Japanese) | (See Japanese page) |
Keyword(in English) | genetic algorithm / 3-D VLSI / rectilinear Steiner tree / spanning tree |
Paper # | CAS2002-16 |
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Committee | CAS |
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Conference Date | 2002/6/20(1days) |
Place (in Japanese) | (See Japanese page) |
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Registration To | Circuits and Systems (CAS) |
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Language | JPN |
Title (in Japanese) | (See Japanese page) |
Sub Title (in Japanese) | (See Japanese page) |
Title (in English) | A Rectilinear Steiner Problem Using Genetic Algorithms in 3-D VLSI |
Sub Title (in English) | |
Keyword(1) | genetic algorithm |
Keyword(2) | 3-D VLSI |
Keyword(3) | rectilinear Steiner tree |
Keyword(4) | spanning tree |
1st Author's Name | Kenichi TOYOHARA |
1st Author's Affiliation | Faculty of Engineering, Hiroshima Institute of Technology() |
2nd Author's Name | Kenji SEO |
2nd Author's Affiliation | Faculty of Engineering, Hiroshima Institute of Technology |
3rd Author's Name | Michiroh OHMURA |
3rd Author's Affiliation | Faculty of Engineering, Hiroshima Institute of Technology |
Date | 2002/6/20 |
Paper # | CAS2002-16 |
Volume (vol) | vol.102 |
Number (no) | 161 |
Page | pp.pp.- |
#Pages | 6 |
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