Presentation 2002/5/10
Imvestigation and fundamental analysis of process allocation scheme on Grid computing enbironment
Hiroshi YAMAMOTO, Kenji KAWAHARA, Tetsuya TAKINE, Yuji OIE,
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Abstract(in English) In Grid systems, we can use some computers interspersed widely over the Internet. Therefore, by dividing a long-lived process with large memory, which will be simply called process, into some sub-processes and allocating/transmitting them to some computers individually, we could shorten the total processing time since their sub-processes are managed in parallel. However, each computer on the Grid environment has different CPU performance and/or the different amount of memory from the others and the computational load dynamically changes, so that it would be important to allocate sub-processes to computers according to their performance and/or computational loads. Thus in this research, we investigate process allocation schemes by modeling these computers as M/G/1-PS(Processor Sharing) queues, and analytically evaluate the average processing time in these schemes. Furthermore, we investigate the optimal number of sub-processes that minimizes the average processing time.
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Keyword(in English) Grid computing / process allocation scheme / average processing time / M/G/1-PS queue
Paper # IN2002-8
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Committee IN
Conference Date 2002/5/10(1days)
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Title (in English) Imvestigation and fundamental analysis of process allocation scheme on Grid computing enbironment
Sub Title (in English)
Keyword(1) Grid computing
Keyword(2) process allocation scheme
Keyword(3) average processing time
Keyword(4) M/G/1-PS queue
1st Author's Name Hiroshi YAMAMOTO
1st Author's Affiliation Dept. of Computer Science and Electronics, Kyushu Institute of Technology()
2nd Author's Name Kenji KAWAHARA
2nd Author's Affiliation Dept. of Computer Science and Electronics, Kyushu Institute of Technology
3rd Author's Name Tetsuya TAKINE
3rd Author's Affiliation Dept. of Applied Mathematics and Physics Graduate School of Informatics, Kyoto University
4th Author's Name Yuji OIE
4th Author's Affiliation Dept. of Computer Science and Electronics, Kyushu Institute of Technology
Date 2002/5/10
Paper # IN2002-8
Volume (vol) vol.102
Number (no) 60
Page pp.pp.-
#Pages 6
Date of Issue