Presentation 2002/12/10
Implementation and evaluation of the Packet Assembly by the Data Driven Processor
Hiroyuki KOBAYASHI, Kisyo TAKAMATSU, Kazunori SHIMAMURA,
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Abstract(in English) With spreading a broadband network, the number of IP packets is increasing in a backbone network, and will exceed the performance of relay routers in the future. So, the authors studied at the Packet Assembly technology that assembles and reassembles some IP packets on the edge routers of backbone, and mitigates the processor load concerning packet routing of backbone network routers. The author implemented the packet assembly technology by the Data Driven Processor with asynchronous pipelines. This paper is reported extracted problems and the solution.
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Keyword(in English) Packet Assembly / Data Driven Processor / Processor load / asynchronous pipeline / Speculative execution
Paper # IE2002-126
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Committee IE
Conference Date 2002/12/10(1days)
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Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Implementation and evaluation of the Packet Assembly by the Data Driven Processor
Sub Title (in English)
Keyword(1) Packet Assembly
Keyword(2) Data Driven Processor
Keyword(3) Processor load
Keyword(4) asynchronous pipeline
Keyword(5) Speculative execution
1st Author's Name Hiroyuki KOBAYASHI
1st Author's Affiliation Graduate School of Engineering, Kochi University of Technology()
2nd Author's Name Kisyo TAKAMATSU
2nd Author's Affiliation Telecommunications Advancement Organization of Japan, Kochi Traffic Research Center
3rd Author's Name Kazunori SHIMAMURA
3rd Author's Affiliation Graduate School of Engineering, Kochi University of Technology:Telecommunications Advancement Organization of Japan, Kochi Traffic Research Center
Date 2002/12/10
Paper # IE2002-126
Volume (vol) vol.102
Number (no) 519
Page pp.pp.-
#Pages 4
Date of Issue