Presentation 2004/5/13
Performance Evaluation of fast DOA Estimator and DOA-based Beamforming
Minseok KIM, Koichi ICHIGE, Hiroyuki ARAI,
PDF Download Page PDF download Page Link
Abstract(in Japanese) (See Japanese page)
Abstract(in English) We have been studied the implementation of fast DOA (Direction of Arrival) estimator called UMP (Unitary MUSIC Processor) using dedicated circuit device of FPGA (Field Programmable Gate Array). This paper presents the estimation accuracy of the UMP and proposes a practical uplink smart antenna system based on DOA estimation with UMP. This system steers the main-lobe for user direction and low side-lobe for the other directions with the modified version of Dolph-Chevyshev beampattern with simple bit shift-add operation to implement easily on logic devices like FPGAs. This paper also shows that it has reasonable performance for the other techniques that require heavy computational load. The total performance evaluation under the multi-path fading channel with small angle spread was analyzed through the hardware level fixed point simulation of UMP DOA estimator.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) DOA Estimation / MUSIC / FPGA / Beamforming / Dolph-Chebyshev beampattern
Paper # A・P2004-18,SAT2004-7
Date of Issue

Conference Information
Committee SAT
Conference Date 2004/5/13(1days)
Place (in Japanese) (See Japanese page)
Place (in English)
Topics (in Japanese) (See Japanese page)
Topics (in English)
Chair
Vice Chair
Secretary
Assistant

Paper Information
Registration To Satellite Telecommunications (SAT)
Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) Performance Evaluation of fast DOA Estimator and DOA-based Beamforming
Sub Title (in English)
Keyword(1) DOA Estimation
Keyword(2) MUSIC
Keyword(3) FPGA
Keyword(4) Beamforming
Keyword(5) Dolph-Chebyshev beampattern
1st Author's Name Minseok KIM
1st Author's Affiliation Department of Electrical and Computer Engineering, Yokohama National University()
2nd Author's Name Koichi ICHIGE
2nd Author's Affiliation Department of Electrical and Computer Engineering, Yokohama National University
3rd Author's Name Hiroyuki ARAI
3rd Author's Affiliation Department of Electrical and Computer Engineering, Yokohama National University
Date 2004/5/13
Paper # A・P2004-18,SAT2004-7
Volume (vol) vol.104
Number (no) 58
Page pp.pp.-
#Pages 6
Date of Issue