Presentation 2004/6/4
N-channel Enhancement : Inversion Mode GaAs-MISFETs with Gate Insulating Layers Formed by Dry Oxi-Nitridation
Mitoko TAMETOU, Masahide TAKEBE, Narayan Chandra Paul, Kouichi IIYAMA, Saburo TAKAMIYA,
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Abstract(in English) We fabricated n-channel enhancement/inversion mode GaAs-MISFETs with 14nm thickness gate insulator, which is formed by oxidation and nitridation of GaAs surface. They have sharper pinch-off than GaAs-MOSFE. Hysteresis is hardly observed. They showed transconductances of 50 mS/mm (Vth~OV) or 20 mS/mm (Vth~1V) depending on recess-etching time. These values are 10~100 times higher than those of previously reported devices.
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Keyword(in English) GaAs / MIS / Nitridation / Oxidation
Paper # ED2004-37
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Committee ED
Conference Date 2004/6/4(1days)
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Language JPN
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) N-channel Enhancement : Inversion Mode GaAs-MISFETs with Gate Insulating Layers Formed by Dry Oxi-Nitridation
Sub Title (in English)
Keyword(1) GaAs
Keyword(2) MIS
Keyword(3) Nitridation
Keyword(4) Oxidation
1st Author's Name Mitoko TAMETOU
1st Author's Affiliation Graduate School of Natural Science and Technology, Kanazawa University()
2nd Author's Name Masahide TAKEBE
2nd Author's Affiliation Graduate School of Natural Science and Technology, Kanazawa University
3rd Author's Name Narayan Chandra Paul
3rd Author's Affiliation Graduate School of Natural Science and Technology, Kanazawa University
4th Author's Name Kouichi IIYAMA
4th Author's Affiliation Graduate School of Natural Science and Technology, Kanazawa University
5th Author's Name Saburo TAKAMIYA
5th Author's Affiliation Graduate School of Natural Science and Technology, Kanazawa University
Date 2004/6/4
Paper # ED2004-37
Volume (vol) vol.104
Number (no) 110
Page pp.pp.-
#Pages 6
Date of Issue