| Presentation | 2003/6/23 [Invited] Ultra-High-Speed InP-Based HEMTs with Sub-50-nm Gate : Impact of Side-Gate-Recess and Parasitic Resistance on High-Speed Performance (AWAD2003 (Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices)) Keisuke SHINOHARA, Yoshimi YAMASHITA, Akira ENDOH, Issei WATANABE, Kohki HIKOSAKA, Takashi MIMURA, Satoshi HIYAMIZU, Toshiaki MATSUI, |
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| PDF Download Page | PDF download Page Link |
| Abstract(in Japanese) | (See Japanese page) |
| Abstract(in English) | We have succeeded in fabricating ultra-short 30-nm-gate InP-based high electron mobility transistors (HEMTs) having an extremely high current gain cutoff frequency (f_T) of 547 GHz. The superior high-speed performances of our HEMTs were mainly due to their optimized gate-recess structures. We investigated the effect of the lateral gate-recess length on f_T by using the asymmetric gate-recess technique, and clarified the impact of source- and drain-side recess lengths on the high-speed performances of the HEMTs from the aspect of electron velocity and source resistance. Furthermore, the importance of parasitic resistances, which is no longer negligible for the ultra-high-speed InP-HEMTs, is also demonstrated. |
| Keyword(in Japanese) | (See Japanese page) |
| Keyword(in English) | InP-HEMTs / Cutoff Frequency (f_T) / Ultra-Short Gate / Side-Gate-Recess / Asymmetric Recess / Parasitic Resistance |
| Paper # | ED2003-77,SDM2003-88 |
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| Conference Information | |
| Committee | ED |
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| Conference Date | 2003/6/23(1days) |
| Place (in Japanese) | (See Japanese page) |
| Place (in English) | |
| Topics (in Japanese) | (See Japanese page) |
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| Paper Information | |
| Registration To | Electron Devices (ED) |
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| Language | ENG |
| Title (in Japanese) | (See Japanese page) |
| Sub Title (in Japanese) | (See Japanese page) |
| Title (in English) | [Invited] Ultra-High-Speed InP-Based HEMTs with Sub-50-nm Gate : Impact of Side-Gate-Recess and Parasitic Resistance on High-Speed Performance (AWAD2003 (Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices)) |
| Sub Title (in English) | |
| Keyword(1) | InP-HEMTs |
| Keyword(2) | Cutoff Frequency (f_T) |
| Keyword(3) | Ultra-Short Gate |
| Keyword(4) | Side-Gate-Recess |
| Keyword(5) | Asymmetric Recess |
| Keyword(6) | Parasitic Resistance |
| 1st Author's Name | Keisuke SHINOHARA |
| 1st Author's Affiliation | Communications Research Laboratory() |
| 2nd Author's Name | Yoshimi YAMASHITA |
| 2nd Author's Affiliation | Fujitsu Laboratories Ltd. |
| 3rd Author's Name | Akira ENDOH |
| 3rd Author's Affiliation | Fujitsu Laboratories Ltd. |
| 4th Author's Name | Issei WATANABE |
| 4th Author's Affiliation | Graduate School of Engineering Science, Osaka University |
| 5th Author's Name | Kohki HIKOSAKA |
| 5th Author's Affiliation | Fujitsu Laboratories Ltd. |
| 6th Author's Name | Takashi MIMURA |
| 6th Author's Affiliation | Fujitsu Laboratories Ltd. |
| 7th Author's Name | Satoshi HIYAMIZU |
| 7th Author's Affiliation | Graduate School of Engineering Science, Osaka University |
| 8th Author's Name | Toshiaki MATSUI |
| 8th Author's Affiliation | Communications Research Laboratory |
| Date | 2003/6/23 |
| Paper # | ED2003-77,SDM2003-88 |
| Volume (vol) | vol.103 |
| Number (no) | 159 |
| Page | pp.pp.- |
| #Pages | 6 |
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