Presentation 2003/6/23
[Invited] Potential of SOI Devices in Sub-100-nm Technology Era : Challenging Studies (AWAD2003 (Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices))
Yasuhisa Omura,
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Abstract(in English) It is demonstrated conventional single-gate SOI devices are superior to double-gate SOI devices in dc and RF performances, and that the minimum channel length of single-gate SOI devices will reach a sub-20-nm range in future. Feasibility of new devices, TBJ SOI MOSFET and HOT SOI MOSFET, are also discussed quantitatively. Finally optical device applications using SOI technology are introduced because interconnection-related delay and attenuation of high-frequency signal should be overcome in the near future.
Keyword(in Japanese) (See Japanese page)
Keyword(in English) SOI / MOSFET / Minimum channel length / Single-gate / Double-gate / Tunneling / Radio Frequency / High temperature / Optical devices
Paper # ED2003-73,SDM2003-84
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Committee ED
Conference Date 2003/6/23(1days)
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Language ENG
Title (in Japanese) (See Japanese page)
Sub Title (in Japanese) (See Japanese page)
Title (in English) [Invited] Potential of SOI Devices in Sub-100-nm Technology Era : Challenging Studies (AWAD2003 (Asia-Pacific Workshop on Fundamental and Application of Advanced Semiconductor Devices))
Sub Title (in English)
Keyword(1) SOI
Keyword(2) MOSFET
Keyword(3) Minimum channel length
Keyword(4) Single-gate
Keyword(5) Double-gate
Keyword(6) Tunneling
Keyword(7) Radio Frequency
Keyword(8) High temperature
Keyword(9) Optical devices
1st Author's Name Yasuhisa Omura
1st Author's Affiliation Faculty of Engineering, Kansai University()
Date 2003/6/23
Paper # ED2003-73,SDM2003-84
Volume (vol) vol.103
Number (no) 159
Page pp.pp.-
#Pages 6
Date of Issue